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authorKit Barton <kbarton@ca.ibm.com>2015-04-17 16:11:05 +0000
committerKit Barton <kbarton@ca.ibm.com>2015-04-17 16:11:05 +0000
commitf4669f5905fa247b44246c9ea4bc0d49dcbdce71 (patch)
tree2e7024202afdb82d92fb054a19675c0e510c960d /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent6812223c0836c7c25ab551165216581fb410aa08 (diff)
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Add support for v1i128 type.
The v1i128 type is needed for the quadword add/substract instructions introduced in POWER8. Futhermore, the PowerPC ABI specifies that parameters of type v1i128 are to be passed in a single vector register, while parameters of type i128 are passed in pairs of GPRs. Thus, it is necessary to be able to differentiate between v1i128 and i128 in LLVM. http://reviews.llvm.org/D8564 llvm-svn: 235198
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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