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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-18 14:28:00 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-18 14:28:00 +0000 |
| commit | aff4d141b922cc6cbbcd575a289fee76271259e7 (patch) | |
| tree | 87bdb25d8dce6d0e22433e61ff9a0191f33341cd /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 1bee6340efca945609438fcac0d6c149952d97d0 (diff) | |
| download | bcm5719-llvm-aff4d141b922cc6cbbcd575a289fee76271259e7.tar.gz bcm5719-llvm-aff4d141b922cc6cbbcd575a289fee76271259e7.zip | |
[mips] Macro expansion for ld, sd for O32
ld and sd when assembled for the O32 ABI expand to a pair of 32 bit word loads
or stores using the specified source or destination register and the next
register.
This patch does not add support for the cases where the offset is greater than
a 16 bit signed immediate as that would lead to a wrong/misleading error
message as the assembler would report "instruction requires a CPU feature
not currently enabled" for ld & sd for MIPS64 when their offset is not a signed
16 bit number.
This fixes PR/29159.
Thanks to Sean Bruno for reporting this issue!
Reviewers: vkalintiris, seanbruno, zoran.jovanovic
Differential Review: https://reviews.llvm.org/D24556
llvm-svn: 284481
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions
