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authorCraig Topper <craig.topper@intel.com>2018-06-26 01:37:02 +0000
committerCraig Topper <craig.topper@intel.com>2018-06-26 01:37:02 +0000
commit689e363ff2294f43d2ee35d08777f7a7ea0ce7dd (patch)
tree9fbdd280f09e5a2adf4917f2477a50bf8224000a /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent9766fd64fba0c3a8a118aee795133a3bab69a0f5 (diff)
downloadbcm5719-llvm-689e363ff2294f43d2ee35d08777f7a7ea0ce7dd.tar.gz
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[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
This recommits r335562 and 335563 as a single commit. The frontend will surround the intrinsic with the appropriate marshalling to/from a scalar type to match the sigature of the builtin that software expects. By exposing the vXi1 type directly in the llvm intrinsic we make it available to optimizers much earlier. This can enable the scalar marshalling code to be optimized away. llvm-svn: 335568
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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