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author | Nikolai Bozhenov <nikolai.bozhenov@intel.com> | 2017-08-04 12:22:17 +0000 |
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committer | Nikolai Bozhenov <nikolai.bozhenov@intel.com> | 2017-08-04 12:22:17 +0000 |
commit | 1545eb34086af1c93d6ef20dd0f07cf2849542ae (patch) | |
tree | 71b23b4d2d2fea87483a5bf9f9aa87a35264077c /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | bdd32609d4fec788023db550975c8e1ff41992fb (diff) | |
download | bcm5719-llvm-1545eb34086af1c93d6ef20dd0f07cf2849542ae.tar.gz bcm5719-llvm-1545eb34086af1c93d6ef20dd0f07cf2849542ae.zip |
[InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary:
This commit allows matchSelectPattern to recognize clamp of float
arguments in the presence of FMF the same way as already done for
integers.
This case is a little different though. With integers, given the
min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX
"automatically". That is not the case for float, because for them only
full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care
about NaNs. On the other hand, some backends (e.g. X86) have only
FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM
nodes are illegal thus selection is not happening. So I decided to do
such kind of transformation in IR (InstCombiner) instead of
complicating the logic in the backend.
Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper
Reviewed By: efriedma
Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits
Patch by Andrei Elovikov <andrei.elovikov@intel.com>
Differential Revision: https://reviews.llvm.org/D33186
llvm-svn: 310054
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions