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authorGerolf Hoflehner <ghoflehner@apple.com>2016-04-24 05:14:01 +0000
committerGerolf Hoflehner <ghoflehner@apple.com>2016-04-24 05:14:01 +0000
commit01b3a6184aae0b5ef1e2cccd4bb8da8d6a0df68a (patch)
tree935cd91c560d5ade3b118bd4ede0ec519bc26601 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent9cf3bf659c7f2e447517115443bc1efb1693b541 (diff)
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[MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)
The original patch caused crashes because it could derefence a null pointer for SelectionDAGTargetInfo for targets that do not define it. Evaluates fmul+fadd -> fmadd combines and similar code sequences in the machine combiner. It adds support for float and double similar to the existing integer implementation. The key features are: - DAGCombiner checks whether it should combine greedily or let the machine combiner do the evaluation. This is only supported on ARM64. - It gives preference to throughput over latency: the heuristic used is to combine always in loops. The targets decides whether the machine combiner should optimize for throughput or latency. - Supports for fmadd, f(n)msub, fmla, fmls patterns - On by default at O3 ffast-math llvm-svn: 267328
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