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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-18 18:26:37 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-18 18:26:37 +0000 |
| commit | f9a42ed0a7f67979cdd20391366e2a059c2e14c8 (patch) | |
| tree | ad19a609b7288c58ae0c10475fca36c72f12959e /llvm/lib/Analysis/RegionPass.cpp | |
| parent | 1ac3f80a6a097afd776e925fee4b1176b4383d7f (diff) | |
| download | bcm5719-llvm-f9a42ed0a7f67979cdd20391366e2a059c2e14c8.tar.gz bcm5719-llvm-f9a42ed0a7f67979cdd20391366e2a059c2e14c8.zip | |
AMDGPU: Relax 32-bit SGPR register class
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.
For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.
llvm-svn: 375267
Diffstat (limited to 'llvm/lib/Analysis/RegionPass.cpp')
0 files changed, 0 insertions, 0 deletions
