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authorMichael Kuperstein <mkuper@google.com>2016-07-07 22:50:23 +0000
committerMichael Kuperstein <mkuper@google.com>2016-07-07 22:50:23 +0000
commit3e3652aef22e2b19e88d48bc9a19834745b910d1 (patch)
tree71f0b93019945f8bb8882c36e8fec0d8a3d7754e /llvm/lib/Analysis/OrderedBasicBlock.cpp
parent0fdffd37095b5c5c405518d3fa651315a29a7dc5 (diff)
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Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller. This fixes PR28146. The original commit tried inserting an 8bit-subreg into a GR32 (not GR32_ABCD) which was not appreciated by fast regalloc on 32-bit. llvm-svn: 274802
Diffstat (limited to 'llvm/lib/Analysis/OrderedBasicBlock.cpp')
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