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authorEli Friedman <efriedma@codeaurora.org>2016-12-20 20:05:07 +0000
committerEli Friedman <efriedma@codeaurora.org>2016-12-20 20:05:07 +0000
commitd03df8145f3b84d51dcb0c37053bfb7dbb69669f (patch)
treeb06ef2528b322e69d62a317ed24cb3f8ea9a0bcc /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
parent9cc1e196034e5844bb11a4bc73bc6ff0b2f4c69e (diff)
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[ARM] Implement isExtractSubvectorCheap.
See https://reviews.llvm.org/D6678 for the history of isExtractSubvectorCheap. Essentially the same considerations apply to ARM. This temporarily breaks the formation of vpadd/vpaddl in certain cases; AddCombineToVPADDL essentially assumes that we won't form VUZP shuffles. See https://reviews.llvm.org/D27779 for followup fix. Differential Revision: https://reviews.llvm.org/D27774 llvm-svn: 290198
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