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authorDale Johannesen <dalej@apple.com>2008-08-28 02:44:49 +0000
committerDale Johannesen <dalej@apple.com>2008-08-28 02:44:49 +0000
commit41be0d4445be6208330d58c46f086839478a55d3 (patch)
treebe10207d7eaa6d2855f844cb6887ff298e1ad471 /llvm/lib/Analysis/IntervalPartition.cpp
parent897b2380d8d5a1a435fd1c750e1b8c3ee20fa4ec (diff)
downloadbcm5719-llvm-41be0d4445be6208330d58c46f086839478a55d3.tar.gz
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Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is the alternative. llvm-svn: 55457
Diffstat (limited to 'llvm/lib/Analysis/IntervalPartition.cpp')
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