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authorDavid Majnemer <david.majnemer@gmail.com>2014-10-11 10:19:52 +0000
committerDavid Majnemer <david.majnemer@gmail.com>2014-10-11 10:19:52 +0000
commit3cac85e07120f0cfcbc8e78a975f68ae99fcebbb (patch)
tree6b590d8c05b0e370555c062d397467af8cb3d12a /llvm/lib/Analysis/InstructionSimplify.cpp
parent686de24128d5abf2c2bde4a99c6639c98f8ec7f0 (diff)
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InstCombine: mul to shl shouldn't preserve nsw
consider: mul i32 nsw %x, -2147483648 this instruction will not result in poison if %x is 1 however, if we transform this into: shl i32 nsw %x, 31 then we will be generating poison because we just shifted into the sign bit. This fixes PR21242. llvm-svn: 219566
Diffstat (limited to 'llvm/lib/Analysis/InstructionSimplify.cpp')
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