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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2019-06-26 12:19:47 +0000 | 
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2019-06-26 12:19:47 +0000 | 
| commit | fbb2e40d5c7da50408b987434b6c44c5874b106f (patch) | |
| tree | f028529ba0f7b2cb69cd54e1538f47e1123326ed /llvm/lib/Analysis/InlineCost.cpp | |
| parent | b0ecc1cc6b896cff8f44dfc370277e0bb84eadbf (diff) | |
| download | bcm5719-llvm-fbb2e40d5c7da50408b987434b6c44c5874b106f.tar.gz bcm5719-llvm-fbb2e40d5c7da50408b987434b6c44c5874b106f.zip | |
[X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness
Summary:
The one thing of note here is that the 'bitwidth' constant (32/64) was previously pessimistic.
Given `x & (-1 >> (C - z))`, we were taking `C` to be `bitwidth(x)`, but in reality
we want `(-1 >> (C - z))` pattern to mean "low z bits must be all-ones".
And for that, `C` should be `bitwidth(-1 >> (C - z))`, i.e. of the shift operation itself.
Last pattern D does not seem to exhibit any of these truncation issues.
Although it has the opposite problem - if we extract low bits (no shift) from i64,
and then truncate to i32, then we fail to shrink this 64-bit extraction into 32-bit extraction.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62806
llvm-svn: 364419
Diffstat (limited to 'llvm/lib/Analysis/InlineCost.cpp')
0 files changed, 0 insertions, 0 deletions

