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authorCraig Topper <craig.topper@intel.com>2018-08-22 19:39:09 +0000
committerCraig Topper <craig.topper@intel.com>2018-08-22 19:39:09 +0000
commit538f8ab43809dcd1ffecfe76d09cd14ba4f52112 (patch)
tree5109a3ee93fb8b20d8279b8f892caffad295bee8 /llvm/lib/Analysis/InlineCost.cpp
parentf8681cea87a53f34387dc2939c223b58588804b9 (diff)
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bcm5719-llvm-538f8ab43809dcd1ffecfe76d09cd14ba4f52112.zip
[X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware
Inspired by what AArch64 does for shifts, this patch attempts to replace shift amounts with neg if we can. This is done directly as part of isel so its as late as possible to avoid breaking some BZHI patterns since those patterns need an unmasked (32-n) to be correct. To avoid manual load folding and custom instruction selection for the negate. I've inserted new nodes in the DAG above the shift node in topological order. Differential Revision: https://reviews.llvm.org/D48789 llvm-svn: 340441
Diffstat (limited to 'llvm/lib/Analysis/InlineCost.cpp')
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