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authorChandler Carruth <chandlerc@gmail.com>2018-07-16 04:17:51 +0000
committerChandler Carruth <chandlerc@gmail.com>2018-07-16 04:17:51 +0000
commitcdf0addc65e72e8bdcc23b1e26af5ff3f7ccd8c6 (patch)
tree9a2dd81514d2c300f79b034feb2170f2d1ffb1e5 /llvm/lib/Analysis/Delinearization.cpp
parentccc84224644e267fce8b70e32833b887f4e12a61 (diff)
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[x86/SLH] Teach speculative load hardening to correctly harden the
indices used by AVX2 and AVX-512 gather instructions. The index vector is hardened by broadcasting the predicate state into a vector register and then or-ing. We don't even have to worry about EFLAGS here. I've added a test for all of the gather intrinsics to make sure that we don't miss one. A particularly interesting creation is the gather prefetch, which needs to be marked as potentially "loading" to get the correct behavior. It's a memory access in many ways, and is actually relevant for SLH. Based on discussion with Craig in review, I've moved it to be `mayLoad` and `mayStore` rather than generic side effects. This matches how we model other prefetch instructions. Many thanks to Craig for the review here. Differential Revision: https://reviews.llvm.org/D49336 llvm-svn: 337144
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