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authorChris Lattner <sabre@nondot.org>2005-01-17 22:19:26 +0000
committerChris Lattner <sabre@nondot.org>2005-01-17 22:19:26 +0000
commit4d9651c76056989afffc8d6b6501211e1bfbb556 (patch)
tree20b78d983a554241915e6bae8f133c69a0919d59 /llvm/lib/Analysis/DataStructure/Local.cpp
parente86c933df76aa938dd8e9078ea669c89a25fe66d (diff)
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Non-volatile loads can be freely reordered against each other. This fixes
X86/reg-pressure.ll again, and allows us to do nice things in other cases. For example, we now codegen this sort of thing: int %loadload(int *%X, int* %Y) { %Z = load int* %Y %Y = load int* %X ;; load between %Z and store %Q = add int %Z, 1 store int %Q, int* %Y ret int %Y } Into this: loadload: mov %EAX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%EAX] mov %ECX, DWORD PTR [%ESP + 8] inc DWORD PTR [%ECX] ret where we weren't able to form the 'inc [mem]' before. This also lets the instruction selector emit loads in any order it wants to, which can be good for register pressure as well. llvm-svn: 19644
Diffstat (limited to 'llvm/lib/Analysis/DataStructure/Local.cpp')
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