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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-07-03 21:51:06 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-07-03 21:51:06 +0000 |
| commit | a37a2fc81f942ef044ea08430e3405bc23ece5c2 (patch) | |
| tree | c155fb41917f7de9b168dd2124af0fd4da76f3e9 /llvm/lib/Analysis/CostModel.cpp | |
| parent | d0afc22c8b10bfb9be911a87f2d5653e9a6c1507 (diff) | |
| download | bcm5719-llvm-a37a2fc81f942ef044ea08430e3405bc23ece5c2.tar.gz bcm5719-llvm-a37a2fc81f942ef044ea08430e3405bc23ece5c2.zip | |
[X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.
This patch adds tablegen patterns to select F16C float-to-half-float
conversion instructions from 'f32_to_f16' and 'f16_to_f32' dag nodes.
If the target doesn't have F16C, then 'f32_to_f16' and 'f16_to_f32'
are expanded into library calls.
llvm-svn: 212293
Diffstat (limited to 'llvm/lib/Analysis/CostModel.cpp')
0 files changed, 0 insertions, 0 deletions
