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author | Sam Parker <sam.parker@arm.com> | 2017-11-02 10:43:10 +0000 |
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committer | Sam Parker <sam.parker@arm.com> | 2017-11-02 10:43:10 +0000 |
commit | 242052c6b4bb1090178e23e6d3ca8284474d17cd (patch) | |
tree | d7c963e6b0483b80e4745c87d7347f513e76c97c /llvm/lib/Analysis/BasicAliasAnalysis.cpp | |
parent | 3c8bf5ec37f4aee21ba295b4e49ccc48b2b9c2ef (diff) | |
download | bcm5719-llvm-242052c6b4bb1090178e23e6d3ca8284474d17cd.tar.gz bcm5719-llvm-242052c6b4bb1090178e23e6d3ca8284474d17cd.zip |
[ARM] and, or, xor and add with shl combine
The generic dag combiner will fold:
(shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
(shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)
This can create constants which are too large to use as an immediate.
Many ALU operations are also able of performing the shl, so we can
unfold the transformation to prevent a mov imm instruction from being
generated.
Other patterns, such as b + ((a << 1) | 510), can also be simplified
in the same manner.
Differential Revision: https://reviews.llvm.org/D38084
llvm-svn: 317197
Diffstat (limited to 'llvm/lib/Analysis/BasicAliasAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions