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authorSam Parker <sam.parker@arm.com>2017-11-02 10:43:10 +0000
committerSam Parker <sam.parker@arm.com>2017-11-02 10:43:10 +0000
commit242052c6b4bb1090178e23e6d3ca8284474d17cd (patch)
treed7c963e6b0483b80e4745c87d7347f513e76c97c /llvm/lib/Analysis/BasicAliasAnalysis.cpp
parent3c8bf5ec37f4aee21ba295b4e49ccc48b2b9c2ef (diff)
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[ARM] and, or, xor and add with shl combine
The generic dag combiner will fold: (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) This can create constants which are too large to use as an immediate. Many ALU operations are also able of performing the shl, so we can unfold the transformation to prevent a mov imm instruction from being generated. Other patterns, such as b + ((a << 1) | 510), can also be simplified in the same manner. Differential Revision: https://reviews.llvm.org/D38084 llvm-svn: 317197
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