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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-02-04 12:51:26 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-02-04 12:51:26 +0000 |
| commit | edbf06a76771f77f70ad6ee1b4641a2d53c14152 (patch) | |
| tree | 470ba327830e755baa528289fbc4a6d454f92f1e /llvm/include | |
| parent | fb222aa31950e7338f17b73a9490657f53e703ae (diff) | |
| download | bcm5719-llvm-edbf06a76771f77f70ad6ee1b4641a2d53c14152.tar.gz bcm5719-llvm-edbf06a76771f77f70ad6ee1b4641a2d53c14152.zip | |
[AsmPrinter] Remove hidden flag -print-schedule.
This patch removes hidden codegen flag -print-schedule effectively reverting the
logic originally committed as r300311
(https://llvm.org/viewvc/llvm-project?view=revision&revision=300311).
Flag -print-schedule was originally introduced by r300311 to address PR32216
(https://bugs.llvm.org/show_bug.cgi?id=32216). That bug was about adding "Better
testing of schedule model instruction latencies/throughputs".
These days, we can use llvm-mca to test scheduling models. So there is no longer
a need for flag -print-schedule in LLVM. The main use case for PR32216 is
now addressed by llvm-mca.
Flag -print-schedule is mainly used for debugging purposes, and it is only
actually used by x86 specific tests. We already have extensive (latency and
throughput) tests under "test/tools/llvm-mca" for X86 processor models. That
means, most (if not all) existing -print-schedule tests for X86 are redundant.
When flag -print-schedule was first added to LLVM, several files had to be
modified; a few APIs gained new arguments (see for example method
MCAsmStreamer::EmitInstruction), and MCSubtargetInfo/TargetSubtargetInfo gained
a couple of getSchedInfoStr() methods.
Method getSchedInfoStr() had to originally work for both MCInst and
MachineInstr. The original implmentation of getSchedInfoStr() introduced a
subtle layering violation (reported as PR37160 and then fixed/worked-around by
r330615).
In retrospect, that new API could have been designed more optimally. We can
always query MCSchedModel to get the latency and throughput. More importantly,
the "sched-info" string should not have been generated by the subtarget.
Note, r317782 fixed an issue where "print-schedule" didn't work very well in the
presence of inline assembly. That commit is also reverted by this change.
Differential Revision: https://reviews.llvm.org/D57244
llvm-svn: 353043
Diffstat (limited to 'llvm/include')
| -rw-r--r-- | llvm/include/llvm/CodeGen/AsmPrinter.h | 3 | ||||
| -rw-r--r-- | llvm/include/llvm/CodeGen/TargetSubtargetInfo.h | 7 | ||||
| -rw-r--r-- | llvm/include/llvm/MC/MCObjectStreamer.h | 3 | ||||
| -rw-r--r-- | llvm/include/llvm/MC/MCParser/MCAsmParser.h | 6 | ||||
| -rw-r--r-- | llvm/include/llvm/MC/MCStreamer.h | 4 | ||||
| -rw-r--r-- | llvm/include/llvm/MC/MCSubtargetInfo.h | 5 |
6 files changed, 2 insertions, 26 deletions
diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h index 4297450546a..fb12bb26b3e 100644 --- a/llvm/include/llvm/CodeGen/AsmPrinter.h +++ b/llvm/include/llvm/CodeGen/AsmPrinter.h @@ -121,9 +121,6 @@ public: using GOTEquivUsePair = std::pair<const GlobalVariable *, unsigned>; MapVector<const MCSymbol *, GOTEquivUsePair> GlobalGOTEquivs; - /// Enable print [latency:throughput] in output. - bool EnablePrintSchedInfo = false; - private: MCSymbol *CurrentFnBegin = nullptr; MCSymbol *CurrentFnEnd = nullptr; diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h index b206cf4e895..bf0e9b20833 100644 --- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h +++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h @@ -189,9 +189,6 @@ public: /// TargetLowering preference). It does not yet disable the postRA scheduler. virtual bool enableMachineScheduler() const; - /// Support printing of [latency:throughput] comment in output .S file. - virtual bool supportPrintSchedInfo() const { return false; } - /// True if the machine scheduler should disable the TLI preference /// for preRA scheduling with the source level scheduler. virtual bool enableMachineSchedDefaultSched() const { return true; } @@ -285,10 +282,6 @@ public: /// possible. virtual bool enableSubRegLiveness() const { return false; } - /// Returns string representation of scheduler comment - std::string getSchedInfoStr(const MachineInstr &MI) const; - std::string getSchedInfoStr(MCInst const &MCI) const override; - /// This is called after a .mir file was loaded. virtual void mirFileLoaded(MachineFunction &MF) const; }; diff --git a/llvm/include/llvm/MC/MCObjectStreamer.h b/llvm/include/llvm/MC/MCObjectStreamer.h index 07d0ce68336..8affca49490 100644 --- a/llvm/include/llvm/MC/MCObjectStreamer.h +++ b/llvm/include/llvm/MC/MCObjectStreamer.h @@ -115,8 +115,7 @@ public: void EmitSLEB128Value(const MCExpr *Value) override; void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override; void ChangeSection(MCSection *Section, const MCExpr *Subsection) override; - void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, - bool = false) override; + void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override; /// Emit an instruction to a special fragment, because this instruction /// can change its size during relaxation. diff --git a/llvm/include/llvm/MC/MCParser/MCAsmParser.h b/llvm/include/llvm/MC/MCParser/MCAsmParser.h index d65347ab980..da5653ee71d 100644 --- a/llvm/include/llvm/MC/MCParser/MCAsmParser.h +++ b/llvm/include/llvm/MC/MCParser/MCAsmParser.h @@ -129,9 +129,6 @@ protected: // Can only create subclasses. /// Flag tracking whether any errors have been encountered. bool HadError = false; - /// Enable print [latency:throughput] in output file. - bool EnablePrintSchedInfo = false; - bool ShowParsedOperands = false; public: @@ -165,9 +162,6 @@ public: bool getShowParsedOperands() const { return ShowParsedOperands; } void setShowParsedOperands(bool Value) { ShowParsedOperands = Value; } - void setEnablePrintSchedInfo(bool Value) { EnablePrintSchedInfo = Value; } - bool shouldPrintSchedInfo() const { return EnablePrintSchedInfo; } - /// Run the parser on the input source buffer. virtual bool Run(bool NoInitialTextSection, bool NoFinalize = false) = 0; diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h index 57514bebe12..dc2386fca85 100644 --- a/llvm/include/llvm/MC/MCStreamer.h +++ b/llvm/include/llvm/MC/MCStreamer.h @@ -952,9 +952,7 @@ public: virtual void EmitAddrsigSym(const MCSymbol *Sym) {} /// Emit the given \p Instruction into the current section. - /// PrintSchedInfo == true then schedul comment should be added to output - virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, - bool PrintSchedInfo = false); + virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI); /// Set the bundle alignment mode from now on in the section. /// The argument is the power of 2 to which the alignment is set. The diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h index 2ad72c3c325..c7472a28c77 100644 --- a/llvm/include/llvm/MC/MCSubtargetInfo.h +++ b/llvm/include/llvm/MC/MCSubtargetInfo.h @@ -180,11 +180,6 @@ public: auto Found = std::lower_bound(ProcDesc.begin(), ProcDesc.end(), CPU); return Found != ProcDesc.end() && StringRef(Found->Key) == CPU; } - - /// Returns string representation of scheduler comment - virtual std::string getSchedInfoStr(MCInst const &MCI) const { - return {}; - } }; } // end namespace llvm |

