summaryrefslogtreecommitdiffstats
path: root/llvm/include
diff options
context:
space:
mode:
authorEli Friedman <efriedma@quicinc.com>2020-01-13 15:32:45 -0800
committerEli Friedman <efriedma@quicinc.com>2020-01-13 16:55:41 -0800
commite68e4cbcc50ba7ab8df5e09023f15e6cc2223bef (patch)
treec060df72c78b35ee0942dac9e9408add9fb55168 /llvm/include
parent989bed989a41732d1b70314bd9063ccd6e74fe5c (diff)
downloadbcm5719-llvm-e68e4cbcc50ba7ab8df5e09023f15e6cc2223bef.tar.gz
bcm5719-llvm-e68e4cbcc50ba7ab8df5e09023f15e6cc2223bef.zip
[GlobalISel] Change representation of shuffle masks in MachineOperand.
We're planning to remove the shufflemask operand from ShuffleVectorInst (D72467); fix GlobalISel so it doesn't depend on that Constant. The change to prelegalizercombiner-shuffle-vector.mir happens because the input contains a literal "-1" in the mask (so the parser/verifier weren't really handling it properly). We now treat it as equivalent to "undef" in all contexts. Differential Revision: https://reviews.llvm.org/D72663
Diffstat (limited to 'llvm/include')
-rw-r--r--llvm/include/llvm/CodeGen/MachineFunction.h2
-rw-r--r--llvm/include/llvm/CodeGen/MachineInstrBuilder.h2
-rw-r--r--llvm/include/llvm/CodeGen/MachineOperand.h11
3 files changed, 9 insertions, 6 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index 9eee7a56adb..7f4a3a8c2f9 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -796,6 +796,8 @@ public:
/// Allocate and initialize a register mask with @p NumRegister bits.
uint32_t *allocateRegMask();
+ ArrayRef<int> allocateShuffleMask(ArrayRef<int> Mask);
+
/// Allocate and construct an extra info structure for a `MachineInstr`.
///
/// This is allocated on the function's allocator and so lives the life of
diff --git a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
index 880d4829ac7..cabb9f1c97c 100644
--- a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -250,7 +250,7 @@ public:
return *this;
}
- const MachineInstrBuilder &addShuffleMask(const Constant *Val) const {
+ const MachineInstrBuilder &addShuffleMask(ArrayRef<int> Val) const {
MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
return *this;
}
diff --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h
index 4222c03b023..9ba2b01cb4b 100644
--- a/llvm/include/llvm/CodeGen/MachineOperand.h
+++ b/llvm/include/llvm/CodeGen/MachineOperand.h
@@ -163,7 +163,8 @@ private:
MachineInstr *ParentMI;
/// Contents union - This contains the payload for the various operand types.
- union {
+ union ContentsUnion {
+ ContentsUnion() {}
MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
const ConstantFP *CFP; // For MO_FPImmediate.
const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
@@ -174,7 +175,7 @@ private:
unsigned CFIIndex; // For MO_CFI.
Intrinsic::ID IntrinsicID; // For MO_IntrinsicID.
unsigned Pred; // For MO_Predicate
- const Constant *ShuffleMask; // For MO_ShuffleMask
+ ArrayRef<int> ShuffleMask; // For MO_ShuffleMask
struct { // For MO_Register.
// Register number is in SmallContents.RegNo.
@@ -587,7 +588,7 @@ public:
return Contents.Pred;
}
- const Constant *getShuffleMask() const {
+ ArrayRef<int> getShuffleMask() const {
assert(isShuffleMask() && "Wrong MachineOperand accessor");
return Contents.ShuffleMask;
}
@@ -915,9 +916,9 @@ public:
return Op;
}
- static MachineOperand CreateShuffleMask(const Constant *C) {
+ static MachineOperand CreateShuffleMask(ArrayRef<int> Mask) {
MachineOperand Op(MachineOperand::MO_ShuffleMask);
- Op.Contents.ShuffleMask = C;
+ Op.Contents.ShuffleMask = Mask;
return Op;
}
OpenPOWER on IntegriCloud