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| author | Igor Breger <igor.breger@intel.com> | 2015-09-09 14:35:09 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2015-09-09 14:35:09 +0000 |
| commit | ac29a8292193c623fb81c80c6995836df415b935 (patch) | |
| tree | 7968a4f7307fc58bef41ee8836f2af87d68661da /llvm/include | |
| parent | 2fbab9d89351e52e84b412371628754217259a22 (diff) | |
| download | bcm5719-llvm-ac29a8292193c623fb81c80c6995836df415b935.tar.gz bcm5719-llvm-ac29a8292193c623fb81c80c6995836df415b935.zip | |
AVX512: Implemented encoding and intrinsics for
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11802
llvm-svn: 247149
Diffstat (limited to 'llvm/include')
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsX86.td | 48 |
1 files changed, 40 insertions, 8 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 82d57e344bc..e1e0b5500e8 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -2233,20 +2233,52 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_avx512_mask_vextractf32x4_512 : GCCBuiltin<"__builtin_ia32_extractf32x4_mask">, - Intrinsic<[llvm_v4f32_ty], [llvm_v16f32_ty, llvm_i8_ty, - llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4f32_ty], [llvm_v16f32_ty, llvm_i32_ty, + llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>; def int_x86_avx512_mask_vextracti32x4_512 : GCCBuiltin<"__builtin_ia32_extracti32x4_mask">, - Intrinsic<[llvm_v4i32_ty], [llvm_v16i32_ty, llvm_i8_ty, - llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i32_ty], [llvm_v16i32_ty, llvm_i32_ty, + llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextractf32x4_256 : + GCCBuiltin<"__builtin_ia32_extractf32x4_256_mask">, + Intrinsic<[llvm_v4f32_ty], [llvm_v8f32_ty, llvm_i32_ty, + llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextracti32x4_256 : + GCCBuiltin<"__builtin_ia32_extracti32x4_256_mask">, + Intrinsic<[llvm_v4i32_ty], [llvm_v8i32_ty, llvm_i32_ty, + llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextractf64x2_256 : + GCCBuiltin<"__builtin_ia32_extractf64x2_256_mask">, + Intrinsic<[llvm_v2f64_ty], [llvm_v4f64_ty, llvm_i32_ty, + llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextracti64x2_256 : + GCCBuiltin<"__builtin_ia32_extracti64x2_256_mask">, + Intrinsic<[llvm_v2i64_ty], [llvm_v4i64_ty, llvm_i32_ty, + llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextractf64x2_512 : + GCCBuiltin<"__builtin_ia32_extractf64x2_512_mask">, + Intrinsic<[llvm_v2f64_ty], [llvm_v8f64_ty, llvm_i32_ty, + llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextracti64x2_512 : + GCCBuiltin<"__builtin_ia32_extracti64x2_512_mask">, + Intrinsic<[llvm_v2i64_ty], [llvm_v8i64_ty, llvm_i32_ty, + llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextractf32x8_512 : + GCCBuiltin<"__builtin_ia32_extractf32x8_mask">, + Intrinsic<[llvm_v8f32_ty], [llvm_v16f32_ty, llvm_i32_ty, + llvm_v8f32_ty, llvm_i8_ty], [IntrNoMem]>; + def int_x86_avx512_mask_vextracti32x8_512 : + GCCBuiltin<"__builtin_ia32_extracti32x8_mask">, + Intrinsic<[llvm_v8i32_ty],[llvm_v16i32_ty, llvm_i32_ty, + llvm_v8i32_ty, llvm_i8_ty], [IntrNoMem]>; def int_x86_avx512_mask_vextractf64x4_512 : GCCBuiltin<"__builtin_ia32_extractf64x4_mask">, - Intrinsic<[llvm_v4f64_ty], [llvm_v8f64_ty, llvm_i8_ty, - llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4f64_ty], [llvm_v8f64_ty, llvm_i32_ty, + llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>; def int_x86_avx512_mask_vextracti64x4_512 : GCCBuiltin<"__builtin_ia32_extracti64x4_mask">, - Intrinsic<[llvm_v4i64_ty], [llvm_v8i64_ty, llvm_i8_ty, - llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v4i64_ty], [llvm_v8i64_ty, llvm_i32_ty, + llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>; } // Conditional load ops |
