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| author | Jessica Paquette <jpaquette@apple.com> | 2019-02-04 17:32:47 +0000 |
|---|---|---|
| committer | Jessica Paquette <jpaquette@apple.com> | 2019-02-04 17:32:47 +0000 |
| commit | 92834ffcbf83f55def9360b0e9e41872c65cfd64 (patch) | |
| tree | 41cd481f649ea66bdfe1e641b6997977ee25189c /llvm/include | |
| parent | 834bded9d6d5a56b8ca59ce36fb4e0670af84daf (diff) | |
| download | bcm5719-llvm-92834ffcbf83f55def9360b0e9e41872c65cfd64.tar.gz bcm5719-llvm-92834ffcbf83f55def9360b0e9e41872c65cfd64.zip | |
Revert "[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR"
This reverts commit b05ecba6d687fcb3078509220c67458bf1d77a2e.
Apparently adding floor breaks AMDGPU somehow, so I have to back this out
while I look into it.
llvm-svn: 353065
Diffstat (limited to 'llvm/include')
| -rw-r--r-- | llvm/include/llvm/Support/TargetOpcodes.def | 3 | ||||
| -rw-r--r-- | llvm/include/llvm/Target/GenericOpcodes.td | 7 | ||||
| -rw-r--r-- | llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 |
3 files changed, 0 insertions, 11 deletions
diff --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def index 5f4e9c67a09..23d008a0147 100644 --- a/llvm/include/llvm/Support/TargetOpcodes.def +++ b/llvm/include/llvm/Support/TargetOpcodes.def @@ -529,9 +529,6 @@ HANDLE_TARGET_OPCODE(G_FSIN) /// Floating point square root. HANDLE_TARGET_OPCODE(G_FSQRT) -/// Floating point floor. -HANDLE_TARGET_OPCODE(G_FFLOOR) - /// Generic AddressSpaceCast. HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST) diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td index 41d1ed9937a..b61ed926501 100644 --- a/llvm/include/llvm/Target/GenericOpcodes.td +++ b/llvm/include/llvm/Target/GenericOpcodes.td @@ -579,13 +579,6 @@ def G_FSQRT : GenericInstruction { let hasSideEffects = 0; } -// Floating point floor of a value. -def G_FFLOOR : GenericInstruction { - let OutOperandList = (outs type0:$dst); - let InOperandList = (ins type0:$src1); - let hasSideEffects = 0; -} - //------------------------------------------------------------------------------ // Opcodes for LLVM Intrinsics //------------------------------------------------------------------------------ diff --git a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td index 6b0434a0758..cbda4ab86a5 100644 --- a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td +++ b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td @@ -93,7 +93,6 @@ def : GINodeEquiv<G_FCOS, fcos>; def : GINodeEquiv<G_FSIN, fsin>; def : GINodeEquiv<G_FABS, fabs>; def : GINodeEquiv<G_FSQRT, fsqrt>; -def : GINodeEquiv<G_FFLOOR, ffloor>; // Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some // complications that tablegen must take care of. For example, Predicates such |
