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authorCraig Topper <craig.topper@intel.com>2019-02-19 22:37:00 +0000
committerCraig Topper <craig.topper@intel.com>2019-02-19 22:37:00 +0000
commit8eade092497e17ad1cfbb1a7c3d9156686b229cc (patch)
treeeec7c65ac36e8cea9fdfec1090f11b48595d25b8 /llvm/include
parentb6bc11d4067df37af30cddddc7f1ffd42391b901 (diff)
downloadbcm5719-llvm-8eade092497e17ad1cfbb1a7c3d9156686b229cc.tar.gz
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[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobbering EFLAGS to prevent mis-scheduling during conversion from SelectionDAG to MIR.
After r354178, these instruction expand to a sequence that uses an OR instruction. That OR clobbers EFLAGS so we need to state that to avoid accidentally using the clobbered flags. Our tests show the bug, but I didn't notice because the SETcc instructions didn't move after r354178 since it used to be safe to do the fp->int conversion first. We should probably convert this whole sequence to SelectionDAG instead of a custom inserter to avoid mistakes like this. Fixes PR40779 llvm-svn: 354395
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