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| author | Cong Hou <congh@google.com> | 2016-02-24 23:40:36 +0000 |
|---|---|---|
| committer | Cong Hou <congh@google.com> | 2016-02-24 23:40:36 +0000 |
| commit | 4ce0280a416c5aa9121e98652d3bfaf166d9ee78 (patch) | |
| tree | ab0cea9abd439dfed12a970fc0349cc0735fbbca /llvm/include | |
| parent | c445d387769d05753f678f6fb88403e2e1b18710 (diff) | |
| download | bcm5719-llvm-4ce0280a416c5aa9121e98652d3bfaf166d9ee78.tar.gz bcm5719-llvm-4ce0280a416c5aa9121e98652d3bfaf166d9ee78.zip | |
Detecte vector reduction operations just before instruction selection.
(This is the second attemp to commit this patch, after fixing pr26652 & pr26653).
This patch detects vector reductions before instruction selection. Vector
reductions are vectorized reduction operations, and for such operations we have
freedom to reorganize the elements of the result as long as the reduction of them
stay unchanged. This will enable some reduction pattern recognition during
instruction combine such as SAD/dot-product on X86. A flag is added to
SDNodeFlags to mark those vector reduction nodes to be checked during instruction
combine.
To detect those vector reductions, we search def-use chains starting from the
given instruction, and check if all uses fall into two categories:
1. Reduction with another vector.
2. Reduction on all elements.
in which 2 is detected by recognizing the pattern that the loop vectorizer
generates to reduce all elements in the vector outside of the loop, which
includes several ShuffleVector and one ExtractElement instructions.
Differential revision: http://reviews.llvm.org/D15250
llvm-svn: 261804
Diffstat (limited to 'llvm/include')
| -rw-r--r-- | llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h index 536fc656e8e..c6f7a9eee26 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h @@ -328,6 +328,7 @@ private: bool NoInfs : 1; bool NoSignedZeros : 1; bool AllowReciprocal : 1; + bool VectorReduction : 1; public: /// Default constructor turns off all optimization flags. @@ -340,6 +341,7 @@ public: NoInfs = false; NoSignedZeros = false; AllowReciprocal = false; + VectorReduction = false; } // These are mutators for each flag. @@ -351,6 +353,7 @@ public: void setNoInfs(bool b) { NoInfs = b; } void setNoSignedZeros(bool b) { NoSignedZeros = b; } void setAllowReciprocal(bool b) { AllowReciprocal = b; } + void setVectorReduction(bool b) { VectorReduction = b; } // These are accessors for each flag. bool hasNoUnsignedWrap() const { return NoUnsignedWrap; } @@ -361,6 +364,7 @@ public: bool hasNoInfs() const { return NoInfs; } bool hasNoSignedZeros() const { return NoSignedZeros; } bool hasAllowReciprocal() const { return AllowReciprocal; } + bool hasVectorReduction() const { return VectorReduction; } /// Return a raw encoding of the flags. /// This function should only be used to add data to the NodeID value. |

