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| author | Scott Michel <scottm@aero.org> | 2008-01-11 02:53:15 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-01-11 02:53:15 +0000 |
| commit | 8d5841ae3c537699c9c1acde5142a0dccb7b800e (patch) | |
| tree | 3988f1cd626c25dbc4e7f1fc010b5895e071df0f /llvm/include/llvm/IntrinsicsCellSPU.td | |
| parent | 4cc275c3fb6a0398708fd61e286cf45a472d8037 (diff) | |
| download | bcm5719-llvm-8d5841ae3c537699c9c1acde5142a0dccb7b800e.tar.gz bcm5719-llvm-8d5841ae3c537699c9c1acde5142a0dccb7b800e.zip | |
More CellSPU refinement and progress:
- Cleaned up custom load/store logic, common code is now shared [see note
below], cleaned up address modes
- More test cases: various intrinsics, structure element access (load/store
test), updated target data strings, indirect function calls.
Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode
structures: they now share a common base class, LSBaseSDNode, that
provides an interface to their common functionality. There is some hackery
to access the proper operand depending on the derived class; otherwise,
to do a proper job would require finding and rearranging the SDOperands
sent to StoreSDNode's constructor. The current refactor errs on the
side of being conservatively and backwardly compatible while providing
functionality that reduces redundant code for targets where loads and
stores are custom-lowered.
llvm-svn: 45851
Diffstat (limited to 'llvm/include/llvm/IntrinsicsCellSPU.td')
| -rw-r--r-- | llvm/include/llvm/IntrinsicsCellSPU.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/include/llvm/IntrinsicsCellSPU.td b/llvm/include/llvm/IntrinsicsCellSPU.td index 0e257c150ae..7030278708e 100644 --- a/llvm/include/llvm/IntrinsicsCellSPU.td +++ b/llvm/include/llvm/IntrinsicsCellSPU.td @@ -17,8 +17,8 @@ //===----------------------------------------------------------------------===// // 7-bit integer type, used as an immediate: -def cell_i7_ty: LLVMType<i16>; // Note: This was i8 -def cell_i8_ty: LLVMType<i16>; // Note: This was i8 +def cell_i7_ty: LLVMType<i8>; +def cell_i8_ty: LLVMType<i8>; class v16i8_u7imm<string builtin_suffix> : GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>, @@ -27,7 +27,7 @@ class v16i8_u7imm<string builtin_suffix> : class v16i8_u8imm<string builtin_suffix> : GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty], + Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], [IntrNoMem]>; class v16i8_s10imm<string builtin_suffix> : |

