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author | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2018-04-12 05:53:20 +0000 |
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committer | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2018-04-12 05:53:20 +0000 |
commit | bcadfee2ad0eb951d88a4c516150122fdf004617 (patch) | |
tree | 1ad8556c8f92c0ea9ff1c214cae4e413e3ba9d10 /llvm/docs | |
parent | 21d28fe8b8e4624ceb0b06213a8b07f005016951 (diff) | |
download | bcm5719-llvm-bcadfee2ad0eb951d88a4c516150122fdf004617.tar.gz bcm5719-llvm-bcadfee2ad0eb951d88a4c516150122fdf004617.zip |
[NFC] fix trivial typos in documents and comments
"is is" -> "is", "if if" -> "if", "or or" -> "or"
llvm-svn: 329878
Diffstat (limited to 'llvm/docs')
-rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 2 | ||||
-rw-r--r-- | llvm/docs/ExceptionHandling.rst | 2 | ||||
-rw-r--r-- | llvm/docs/ProgrammersManual.rst | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index c07df6772c6..d6255c8a15e 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -2269,7 +2269,7 @@ VGPR register initial state is defined in > 1) wavefront lane. ========== ========================== ====== ============================== -The setting of registers is is done by GPU CP/ADC/SPI hardware as follows: +The setting of registers is done by GPU CP/ADC/SPI hardware as follows: 1. SGPRs before the Work-Group Ids are set by CP using the 16 User Data registers. diff --git a/llvm/docs/ExceptionHandling.rst b/llvm/docs/ExceptionHandling.rst index e65c1bede04..18ff53cd3b6 100644 --- a/llvm/docs/ExceptionHandling.rst +++ b/llvm/docs/ExceptionHandling.rst @@ -365,7 +365,7 @@ abstract interface. When used in the native Windows C++ exception handling implementation, this intrinsic serves as a placeholder to delimit code before a catch handler is -outlined. When the handler is is outlined, this intrinsic will be replaced +outlined. When the handler is outlined, this intrinsic will be replaced by instructions that retrieve the exception object pointer from the frame allocation block. diff --git a/llvm/docs/ProgrammersManual.rst b/llvm/docs/ProgrammersManual.rst index 07048a52319..5e510fb7e7b 100644 --- a/llvm/docs/ProgrammersManual.rst +++ b/llvm/docs/ProgrammersManual.rst @@ -2984,7 +2984,7 @@ Conceptually, ``LLVMContext`` provides isolation. Every LLVM entity in-memory IR belongs to an ``LLVMContext``. Entities in different contexts *cannot* interact with each other: ``Module``\ s in different contexts cannot be linked together, ``Function``\ s cannot be added to ``Module``\ s in different -contexts, etc. What this means is that is is safe to compile on multiple +contexts, etc. What this means is that is safe to compile on multiple threads simultaneously, as long as no two threads operate on entities within the same context. |