diff options
| author | Marek Olsak <marek.olsak@amd.com> | 2018-02-07 16:01:00 +0000 |
|---|---|---|
| committer | Marek Olsak <marek.olsak@amd.com> | 2018-02-07 16:01:00 +0000 |
| commit | 871c30e540318b1ba2a6f9547df1937707755529 (patch) | |
| tree | b76987bce04291bf077be9684b72994845a3bc52 /llvm/docs | |
| parent | b2cc77985b1c02c08651e2547c094781e75343eb (diff) | |
| download | bcm5719-llvm-871c30e540318b1ba2a6f9547df1937707755529.tar.gz bcm5719-llvm-871c30e540318b1ba2a6f9547df1937707755529.zip | |
AMDGPU: Add 32-bit constant address space
Note: This is a candidate for LLVM 6.0, because it was planned to be
in that release but was delayed due to a long review period.
Merge conflict in release_60 - resolution:
Add "-p6:32:32" into the second (non-amdgiz) string.
Only scalar loads support 32-bit pointers. An address in a VGPR will
fail to compile. That's OK because the results of loads will only be used
in places where VGPRs are forbidden.
Updated AMDGPUAliasAnalysis and used SReg_64_XEXEC.
The tests cover all uses cases we need for Mesa.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D41651
llvm-svn: 324487
Diffstat (limited to 'llvm/docs')
| -rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index ff22f2c3597..21e9308e059 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -285,6 +285,7 @@ LLVM Address Space number is used throughout LLVM (for example, in LLVM IR). 3 Local (group/LDS) Local (group/LDS) Local (group/LDS) Local (group/LDS) 4 Generic (Flat) Region (GDS) Region (GDS) Constant 5 Region (GDS) Private (Scratch) Private (Scratch) Private (Scratch) + 6 Constant 32-bit Constant 32-bit Constant 32-bit Constant 32-bit ================== ================= ================= ================= ================= Current Default |
