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| author | Chris Lattner <sabre@nondot.org> | 2011-11-27 22:12:32 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2011-11-27 22:12:32 +0000 |
| commit | 7b32d97e02202073bad4f215caf48ebe303f8ab5 (patch) | |
| tree | d24d50962cdc80100c3f19e415b4989ec0e26d0a /llvm/docs | |
| parent | fbef4c8657518dfb14da794bbdd86bd2fd610cbc (diff) | |
| download | bcm5719-llvm-7b32d97e02202073bad4f215caf48ebe303f8ab5.tar.gz bcm5719-llvm-7b32d97e02202073bad4f215caf48ebe303f8ab5.zip | |
arm and carve out a place ot mention segmented stacks.
llvm-svn: 145204
Diffstat (limited to 'llvm/docs')
| -rw-r--r-- | llvm/docs/ReleaseNotes.html | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/llvm/docs/ReleaseNotes.html b/llvm/docs/ReleaseNotes.html index f7c3edefb36..b1b1e14f865 100644 --- a/llvm/docs/ReleaseNotes.html +++ b/llvm/docs/ReleaseNotes.html @@ -929,6 +929,7 @@ be used to verify some algorithms. make it run faster:</p> <ul> +<li>XXX: Segmented stacks.</li> <li>LLVM generates substantially better code for indirect gotos due to a new tail duplication pass, which can be a substantial performance win for interpreter loops that use them.</li> @@ -991,15 +992,15 @@ be used to verify some algorithms. <p>New features of the ARM target include:</p> <ul> - <li>Reworked Set Jump Long Jump EH Lowering,</li> - <li>improved support for Cortex-M series processors, and</li> - <li>beta quality integrated assembler support.</li> - - Better code generation for Cortex-A9 - ARM inline asm constraints implemented. - Old arm disassembler replaced with a new one based on autogenerated encoding information from ARM .td files. - Better performance for Neon code in clang due to SRoA improvements. - +<li>The ARM backend generates much faster code for Cortex-A9 chips.</li> +<li>The ARM backend has improved support for Cortex-M series processors.</li> +<li>The ARM inline assembly constraints have been implemented and are now fully + supported.</li> +<li>NEON code produced by Clang often runs much faster due to improvements in + the Scalar Replacement of Aggregates pass.</li> +<li>The old ARM disassembler is replaced with a new one based on autogenerated + encoding information from ARM .td files.</li> +<li>The integrated assembler has made major leaps forward, but is still beta quality in LLVM 3.0.</li> </ul> </div> @@ -1011,7 +1012,8 @@ be used to verify some algorithms. <div> -<p>New features and major changes in the MIPS target include:</p> +<p>This release has seen major new work on just about every aspect of the MIPS + backend. Some of the major new features include:</p> <ul> <li>Most MIPS32r1 and r2 instructions are now supported.</li> |
