diff options
| author | Neil Henning <neil.henning@amd.com> | 2019-03-18 14:44:28 +0000 |
|---|---|---|
| committer | Neil Henning <neil.henning@amd.com> | 2019-03-18 14:44:28 +0000 |
| commit | 523dab07887f8bfeb4697ab8103ab76adddfc1fc (patch) | |
| tree | 11148aba9c9bcd61f9a2efc46324b01f214ca8eb /llvm/docs | |
| parent | 6063393536cc8f6129c1bc4d590e812525e16abb (diff) | |
| download | bcm5719-llvm-523dab07887f8bfeb4697ab8103ab76adddfc1fc.tar.gz bcm5719-llvm-523dab07887f8bfeb4697ab8103ab76adddfc1fc.zip | |
[AMDGPU] Add an experimental buffer fat pointer address space.
Add an experimental buffer fat pointer address space that is currently
unhandled in the backend. This commit reserves address space 7 as a
non-integral pointer repsenting the 160-bit fat pointer (128-bit buffer
descriptor + 32-bit offset) that is heavily used in graphics workloads
using the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D58957
llvm-svn: 356373
Diffstat (limited to 'llvm/docs')
| -rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index 7963543f507..630e147af8b 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -281,9 +281,9 @@ LLVM Address Space number is used throughout LLVM (for example, in LLVM IR). .. table:: Address Space Mapping :name: amdgpu-address-space-mapping-table - ================== ================= + ================== ================================= LLVM Address Space Memory Space - ================== ================= + ================== ================================= 0 Generic (Flat) 1 Global 2 Region (GDS) @@ -291,7 +291,15 @@ LLVM Address Space number is used throughout LLVM (for example, in LLVM IR). 4 Constant 5 Private (Scratch) 6 Constant 32-bit - ================== ================= + 7 Buffer Fat Pointer (experimental) + ================== ================================= + +The buffer fat pointer is an experimental address space that is currently +unsupported in the backend. It exposes a non-integral pointer that is in future +intended to support the modelling of 128-bit buffer descriptors + a 32-bit +offset into the buffer descriptor (in total encapsulating a 160-bit 'pointer'), +allowing us to use normal LLVM load/store/atomic operations to model the buffer +descriptors used heavily in graphics workloads targeting the backend. .. _amdgpu-memory-scopes: |
