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authorEvan Cheng <evan.cheng@apple.com>2009-05-18 22:14:45 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-05-18 22:14:45 +0000
commite87bd1d8f7d930cd0080e803fa4fc629444fd9c8 (patch)
tree5f1c2c47c91762db6983cd0e7d4a2bb330d53c51 /llvm/docs/TableGenFundamentals.html
parent8e35e2d7ae89c3153af7388c223802e30556dbba (diff)
downloadbcm5719-llvm-e87bd1d8f7d930cd0080e803fa4fc629444fd9c8.tar.gz
bcm5719-llvm-e87bd1d8f7d930cd0080e803fa4fc629444fd9c8.zip
Add short descriptions of 'implicit' and 'parallel'.
llvm-svn: 72050
Diffstat (limited to 'llvm/docs/TableGenFundamentals.html')
-rw-r--r--llvm/docs/TableGenFundamentals.html7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/docs/TableGenFundamentals.html b/llvm/docs/TableGenFundamentals.html
index 08838caf464..bd427116a16 100644
--- a/llvm/docs/TableGenFundamentals.html
+++ b/llvm/docs/TableGenFundamentals.html
@@ -395,6 +395,13 @@ supported include:</p>
<dd>a dag value. The first element is required to be a record definition, the
remaining elements in the list may be arbitrary other values, including nested
`<tt>dag</tt>' values.</dd>
+<dt><tt>(implicit a)</tt></dt>
+ <dd>an implicitly defined physical register. This tells the dag instruction
+ selection emitter the input pattern's extra definitions matches implicit
+ physical register definitions.</dd>
+<dt><tt>(parallel (a), (b))</tt></dt>
+ <dd>a list of dags specifying parallel operations which map to the same
+ instruction.</dd>
<dt><tt>!strconcat(a, b)</tt></dt>
<dd>A string value that is the result of concatenating the 'a' and 'b'
strings.</dd>
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