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author | Sanjay Patel <spatel@rotateright.com> | 2015-08-21 17:16:51 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2015-08-21 17:16:51 +0000 |
commit | c9f4aa6b8c114aaeec323007f95590b3af3cbec4 (patch) | |
tree | 722c78e92333e8afb648388980e71dfefa120dd4 /llvm/docs/MIRLangRef.rst | |
parent | 2618e912407cd0965cce02cde5232d0c36c21a2b (diff) | |
download | bcm5719-llvm-c9f4aa6b8c114aaeec323007f95590b3af3cbec4.tar.gz bcm5719-llvm-c9f4aa6b8c114aaeec323007f95590b3af3cbec4.zip |
save some testing time; get rid of the non-SSE chips in this test
It doesn't matter what slow/fast unaligned attribute the old chips
have - they can't use anything more than 4-byte stores.
llvm-svn: 245709
Diffstat (limited to 'llvm/docs/MIRLangRef.rst')
0 files changed, 0 insertions, 0 deletions