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author | Chris Lattner <sabre@nondot.org> | 2001-07-15 00:23:59 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2001-07-15 00:23:59 +0000 |
commit | 12b2c8aae7b0f11c7e9855b4edfb2818e5b1476c (patch) | |
tree | 623746a125e0f9b0c9fa00adb157f1911af5129f /llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt | |
parent | abc1609342fd0a9a64a6c9d239fdd3adabdcc044 (diff) | |
download | bcm5719-llvm-12b2c8aae7b0f11c7e9855b4edfb2818e5b1476c.tar.gz bcm5719-llvm-12b2c8aae7b0f11c7e9855b4edfb2818e5b1476c.zip |
Add notes on instruction selection pass
llvm-svn: 193
Diffstat (limited to 'llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt')
-rw-r--r-- | llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt b/llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt new file mode 100644 index 00000000000..1ae006d5086 --- /dev/null +++ b/llvm/docs/HistoricalNotes/2001-07-08-InstructionSelection2.txt @@ -0,0 +1,25 @@ +Date: Sun, 8 Jul 2001 10:02:20 -0500 +From: Vikram S. Adve <vadve@cs.uiuc.edu> +To: vadve@cs.uiuc.edu, Ruchira Sasanka <sasanka@students.uiuc.edu> +Cc: Chris Lattner <lattner@cs.uiuc.edu> +Subject: RE: machine instruction operands + +I got interrupted and forgot to explain the example. In that case: + + reg will be the 3rd operand of MUL and it will be of type +MO_MInstrVirtualReg. The field MachineInstr* minstr will point to the +instruction that computes reg. + + numElements will be an immediate constant, not a register. + + %sp will be operand 1 of ADD and it will be of type MO_MachineReg. The +field regNum identifies the register. + + numElements will be operand 2 of ADD and it will be of type +MO_VMVirtualReg. The field Value* value identifies the value. + + ptr will be operand 3 of ADD will also be %sp, i.e., of + type MO_MachineReg. regNum identifies the register. + +--Vikram + |