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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-04-05 16:42:32 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-04-05 16:42:32 +0000
commitefc3f39f0293c930dd228cc43ce8c087795476b1 (patch)
treed2ea489b3d0a39e4ecdc069f3a58f4455db05fbf /llvm/docs/CommandGuide
parent6ecdb03f16b7e521c7f07677e2314631cb066244 (diff)
downloadbcm5719-llvm-efc3f39f0293c930dd228cc43ce8c087795476b1.tar.gz
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[documentation][llvm-mca] Update the documentation.
Scheduling models can now describe processor register files and retire control units. This updates the existing documentation and the README file. llvm-svn: 329311
Diffstat (limited to 'llvm/docs/CommandGuide')
-rw-r--r--llvm/docs/CommandGuide/llvm-mca.rst11
1 files changed, 5 insertions, 6 deletions
diff --git a/llvm/docs/CommandGuide/llvm-mca.rst b/llvm/docs/CommandGuide/llvm-mca.rst
index 927de9b4a4e..b6efd4ec2dc 100644
--- a/llvm/docs/CommandGuide/llvm-mca.rst
+++ b/llvm/docs/CommandGuide/llvm-mca.rst
@@ -65,15 +65,14 @@ option specifies "``-``", then the output will also be sent to standard output.
.. option:: -dispatch=<width>
Specify a different dispatch width for the processor. The dispatch width
- defaults to the 'IssueWidth' specified by the processor scheduling model.
- If width is zero, then the default dispatch width is used.
+ defaults to field 'IssueWidth' in the processor scheduling model. If width is
+ zero, then the default dispatch width is used.
.. option:: -register-file-size=<size>
- Specify the size of the register file. When specified, this flag limits
- how many temporary registers are available for register renaming purposes. By
- default, the number of temporary registers is unlimited. A value of zero for
- this flag means "unlimited number of temporary registers".
+ Specify the size of the register file. When specified, this flag limits how
+ many temporary registers are available for register renaming purposes. A value
+ of zero for this flag means "unlimited number of temporary registers".
.. option:: -iterations=<number of iterations>
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