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| author | Craig Topper <craig.topper@gmail.com> | 2017-01-14 07:29:24 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-01-14 07:29:24 +0000 |
| commit | 09b7e0f01d0505b2ba1e3340486685c0393f2b55 (patch) | |
| tree | 62798cd0051aa9a2f23a7ea62526691ce0b2850d /llvm/docs/CommandGuide | |
| parent | 0616b5ff5c58aadfdf208b9350448f4ab0e8281f (diff) | |
| download | bcm5719-llvm-09b7e0f01d0505b2ba1e3340486685c0393f2b55.tar.gz bcm5719-llvm-09b7e0f01d0505b2ba1e3340486685c0393f2b55.zip | |
[AVX-512] Replace V_SET0 in AVX-512 patterns with AVX512_128_SET0. Enhance AVX512_128_SET0 expansion to make this possible.
We'll now expand AVX512_128_SET0 to an EVEX VXORD if VLX available. Or if its not, but register allocation has selected a non-extended register we will use VEX VXORPS. And if its an extended register without VLX we'll use a 512-bit XOR. Do the same for AVX512_FsFLD0SS/SD.
This makes it possible for the register allocator to have all 32 registers available to work with.
llvm-svn: 292004
Diffstat (limited to 'llvm/docs/CommandGuide')
0 files changed, 0 insertions, 0 deletions
