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author | Craig Topper <craig.topper@gmail.com> | 2017-01-14 07:50:52 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2017-01-14 07:50:52 +0000 |
commit | 63e2cd6caa14e1ed5b383c4f68a7f913a2c834eb (patch) | |
tree | 77a421301749186159d75d4716bc9869a4b6cb0c /llvm/docs/CommandGuide/llvm-as.rst | |
parent | 09b7e0f01d0505b2ba1e3340486685c0393f2b55 (diff) | |
download | bcm5719-llvm-63e2cd6caa14e1ed5b383c4f68a7f913a2c834eb.tar.gz bcm5719-llvm-63e2cd6caa14e1ed5b383c4f68a7f913a2c834eb.zip |
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
Isel now selects masked move instructions for vselect instead of blendm. But sometimes it beneficial to register allocation to remove the tied register constraint by using blendm instructions.
This also picks up cases where the masked move was created due to a masked load intrinsic.
Differential Revision: https://reviews.llvm.org/D28454
llvm-svn: 292005
Diffstat (limited to 'llvm/docs/CommandGuide/llvm-as.rst')
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