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authorEli Bendersky <eliben@google.com>2012-10-31 16:41:07 +0000
committerEli Bendersky <eliben@google.com>2012-10-31 16:41:07 +0000
commit70f4e794b5871be161a832a324063cce1ed18053 (patch)
tree91a1a63f5157e79c96c45372da767a8292efdc4a /llvm/docs/CodeGenerator.rst
parentede2fe3bfd6a0b04a4c57488c1fac5b277e0d7bb (diff)
downloadbcm5719-llvm-70f4e794b5871be161a832a324063cce1ed18053.tar.gz
bcm5719-llvm-70f4e794b5871be161a832a324063cce1ed18053.zip
Fix typo in CodeGenerator doc
llvm-svn: 167137
Diffstat (limited to 'llvm/docs/CodeGenerator.rst')
-rw-r--r--llvm/docs/CodeGenerator.rst8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/docs/CodeGenerator.rst b/llvm/docs/CodeGenerator.rst
index f387e7f4c54..900fb8a81f2 100644
--- a/llvm/docs/CodeGenerator.rst
+++ b/llvm/docs/CodeGenerator.rst
@@ -256,10 +256,10 @@ The ``TargetRegisterInfo`` class
The ``TargetRegisterInfo`` class is used to describe the register file of the
target and any interactions between the registers.
-Registers in the code generator are represented in the code generator by
-unsigned integers. Physical registers (those that actually exist in the target
-description) are unique small numbers, and virtual registers are generally
-large. Note that register ``#0`` is reserved as a flag value.
+Registers are represented in the code generator by unsigned integers. Physical
+registers (those that actually exist in the target description) are unique
+small numbers, and virtual registers are generally large. Note that
+register ``#0`` is reserved as a flag value.
Each register in the processor description has an associated
``TargetRegisterDesc`` entry, which provides a textual name for the register
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