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| author | Dan Gohman <gohman@apple.com> | 2009-07-24 00:30:09 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-07-24 00:30:09 +0000 |
| commit | 17151155ed8f83dcbb5db69bca2839ac2da19e0e (patch) | |
| tree | 4d1720975acbb0f9b4291148cdaf6574aff66ee1 /llvm/docs/CodeGenerator.html | |
| parent | cdd405d8047793f07d33e6022313b6c70875b0b0 (diff) | |
| download | bcm5719-llvm-17151155ed8f83dcbb5db69bca2839ac2da19e0e.tar.gz bcm5719-llvm-17151155ed8f83dcbb5db69bca2839ac2da19e0e.zip | |
Remove the IA-64 backend.
llvm-svn: 76920
Diffstat (limited to 'llvm/docs/CodeGenerator.html')
| -rw-r--r-- | llvm/docs/CodeGenerator.html | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html index cf228265c94..2f716a2161a 100644 --- a/llvm/docs/CodeGenerator.html +++ b/llvm/docs/CodeGenerator.html @@ -1380,9 +1380,9 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf, for <tt>RegisterClass</tt>, the last parameter of which is a list of registers. Just commenting some out is one simple way to avoid them being used. A more polite way is to explicitly exclude some registers from - the <i>allocation order</i>. See the definition of the <tt>GR</tt> register - class in <tt>lib/Target/IA64/IA64RegisterInfo.td</tt> for an example of this - (e.g., <tt>numReservedRegs</tt> registers are hidden.)</p> + the <i>allocation order</i>. See the definition of the <tt>GR8</tt> register + class in <tt>lib/Target/X86/X86RegisterInfo.td</tt> for an example of this. + </p> <p>Virtual registers are also denoted by integer numbers. Contrary to physical registers, different virtual registers never share the same number. The |
