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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-12-17 17:38:11 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-12-17 17:38:11 +0000 |
| commit | 47eb63684d22c12b9defb99c394dbd10e26fefff (patch) | |
| tree | f497778b8180320c30d0dda8125e049f5a7d1916 /llvm/docs/AMDGPU/gfx8_src32_1.rst | |
| parent | f700c8b25378acf912982788340f4ab10d8a15ec (diff) | |
| download | bcm5719-llvm-47eb63684d22c12b9defb99c394dbd10e26fefff.tar.gz bcm5719-llvm-47eb63684d22c12b9defb99c394dbd10e26fefff.zip | |
[AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
llvm-svn: 349368
Diffstat (limited to 'llvm/docs/AMDGPU/gfx8_src32_1.rst')
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_src32_1.rst | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/docs/AMDGPU/gfx8_src32_1.rst b/llvm/docs/AMDGPU/gfx8_src32_1.rst new file mode 100644 index 00000000000..67dcdc8ed5e --- /dev/null +++ b/llvm/docs/AMDGPU/gfx8_src32_1.rst @@ -0,0 +1,17 @@ +.. + ************************************************** + * * + * Automatically generated file, do not edit! * + * * + ************************************************** + +.. _amdgpu_synid8_src32_1: + +src +=========================== + +Instruction input. + +*Size:* 1 dword. + +*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`trap<amdgpu_synid_trap>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`constant<amdgpu_synid_constant>` |
