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| author | Tim Northover <Tim.Northover@arm.com> | 2013-01-31 12:12:40 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-01-31 12:12:40 +0000 |
| commit | e0e3aefdd3affa427693ce6434599af38fcb7a13 (patch) | |
| tree | 999392c650b07e3863b4bdbc7ec575105d9cb4c2 /llvm/configure | |
| parent | 469bc7b9c8875acba5757fb607da51ddf85e3e90 (diff) | |
| download | bcm5719-llvm-e0e3aefdd3affa427693ce6434599af38fcb7a13.tar.gz bcm5719-llvm-e0e3aefdd3affa427693ce6434599af38fcb7a13.zip | |
Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
llvm-svn: 174054
Diffstat (limited to 'llvm/configure')
| -rwxr-xr-x | llvm/configure | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/configure b/llvm/configure index 73326a773d5..9e74ab61b60 100755 --- a/llvm/configure +++ b/llvm/configure @@ -1438,8 +1438,8 @@ Optional Features: YES) --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, - x86_64, sparc, powerpc, arm, mips, hexagon, xcore, - msp430, nvptx, and cpp (default=all) + x86_64, sparc, powerpc, arm, aarch64, mips, hexagon, + xcore, msp430, nvptx, and cpp (default=all) --enable-experimental-targets Build experimental host targets: disable or target1,target2,... (default=disable) @@ -4008,6 +4008,7 @@ else sparc*-*) llvm_cv_target_arch="Sparc" ;; powerpc*-*) llvm_cv_target_arch="PowerPC" ;; arm*-*) llvm_cv_target_arch="ARM" ;; + aarch64*-*) llvm_cv_target_arch="AArch64" ;; mips-* | mips64-*) llvm_cv_target_arch="Mips" ;; mipsel-* | mips64el-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; @@ -4041,6 +4042,7 @@ case $host in sparc*-*) host_arch="Sparc" ;; powerpc*-*) host_arch="PowerPC" ;; arm*-*) host_arch="ARM" ;; + aarch64*-*) host_arch="AArch64" ;; mips-* | mips64-*) host_arch="Mips" ;; mipsel-* | mips64el-*) host_arch="Mips" ;; xcore-*) host_arch="XCore" ;; @@ -5373,6 +5375,8 @@ else ;; ARM) TARGET_HAS_JIT=1 ;; + AArch64) TARGET_HAS_JIT=0 + ;; Mips) TARGET_HAS_JIT=1 ;; XCore) TARGET_HAS_JIT=0 @@ -10489,7 +10493,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<EOF -#line 10492 "configure" +#line 10496 "configure" #include "confdefs.h" #if HAVE_DLFCN_H |
