[LLDB] [Windows] Initial support for ARM register contexts

Differential Revision: https://reviews.llvm.org/D69226

llvm-svn: 375392

2 files changed, 63 insertions, 0 deletions

diff --git a/lldb/test/Shell/Register/Inputs/arm-fp-read.cpp b/lldb/test/Shell/Register/Inputs/arm-fp-read.cpp
new file mode 100644
index 00000000000..2dce2ed2d75
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/arm-fp-read.cpp
@@ -0,0 +1,19 @@
+int main() {
+  asm volatile(
+    "vmov.f64 d0,  #0.5\n\t"
+    "vmov.f64 d1,  #1.5\n\t"
+    "vmov.f64 d2,  #2.5\n\t"
+    "vmov.f64 d3,  #3.5\n\t"
+    "vmov.f32 s8,  #4.5\n\t"
+    "vmov.f32 s9,  #5.5\n\t"
+    "vmov.f32 s10, #6.5\n\t"
+    "vmov.f32 s11, #7.5\n\t"
+    "\n\t"
+    "bkpt     #0\n\t"
+    :
+    :
+    : "d0", "d1", "d2", "d3", "s8", "s9", "s10", "s11"
+  );
+
+  return 0;
+}
diff --git a/lldb/test/Shell/Register/Inputs/arm-gp-read.cpp b/lldb/test/Shell/Register/Inputs/arm-gp-read.cpp
new file mode 100644
index 00000000000..fd891c49c09
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/arm-gp-read.cpp
@@ -0,0 +1,44 @@
+#include <cstdint>
+
+struct alignas(16) vec_t {
+  uint64_t a, b;
+};
+
+int main() {
+  constexpr uint32_t gprs[] = {
+    0x00010203,
+    0x10111213,
+    0x20212223,
+    0x30313233,
+    0x40414243,
+    0x50515253,
+    0x60616263,
+    0x70717273,
+  };
+
+  constexpr vec_t vecs[] = {
+    { 0x0F0E0D0C0B0A0908, 0x1716151413121110, },
+    { 0x100F0E0D0C0B0A09, 0x1817161514131211, },
+    { 0x11100F0E0D0C0B0A, 0x1918171615141312, },
+    { 0x1211100F0E0D0C0B, 0x1A19181716151413, },
+  };
+  const vec_t *vec_ptr = vecs;
+
+  asm volatile(
+    "ldrd     r0,  r1,  [%1]\n\t"
+    "ldrd     r2,  r3,  [%1, #8]\n\t"
+    "ldrd     r4,  r5,  [%1, #16]\n\t"
+    "ldrd     r6,  r7,  [%1, #24]\n\t"
+    "\n\t"
+    "vld1.64  {q0, q1}, [%0]!\n\t"
+    "vld1.64  {q2, q3}, [%0]!\n\t"
+    "\n\t"
+    "bkpt     #0\n\t"
+    : "+r"(vec_ptr)
+    : "r"(gprs)
+    : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+      "q0", "q1", "q2", "q3"
+  );
+
+  return 0;
+}