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authorJason Molenda <jmolenda@apple.com>2013-09-27 23:29:10 +0000
committerJason Molenda <jmolenda@apple.com>2013-09-27 23:29:10 +0000
commitc7cda27f79e7f8de7ede70e589c9cf6d5a06beca (patch)
treeefdca33deb2350b193ce49d071001b2c255ac07e /lldb/source
parenta3a045283133bb2733b90ad0826ed13780659334 (diff)
downloadbcm5719-llvm-c7cda27f79e7f8de7ede70e589c9cf6d5a06beca.tar.gz
bcm5719-llvm-c7cda27f79e7f8de7ede70e589c9cf6d5a06beca.zip
Mark armv6m as "compatible" with armv7 - that's the
closest ISA. armv6 wouldn't have the handful of T32 instructions that the Cortex-M0 ISA specifies. <rdar://problem/15099306> llvm-svn: 191588
Diffstat (limited to 'lldb/source')
-rw-r--r--lldb/source/Core/ArchSpec.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lldb/source/Core/ArchSpec.cpp b/lldb/source/Core/ArchSpec.cpp
index e19341bc6a9..7b0587ead56 100644
--- a/lldb/source/Core/ArchSpec.cpp
+++ b/lldb/source/Core/ArchSpec.cpp
@@ -889,7 +889,7 @@ cores_match (const ArchSpec::Core core1, const ArchSpec::Core core2, bool try_in
if (!enforce_exact_match)
{
try_inverse = false;
- if (core2 == ArchSpec::eCore_arm_armv6)
+ if (core2 == ArchSpec::eCore_arm_armv7)
return true;
}
break;
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