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| author | Eugene Zemtsov <ezemtsov@google.com> | 2017-08-30 18:36:48 +0000 |
|---|---|---|
| committer | Eugene Zemtsov <ezemtsov@google.com> | 2017-08-30 18:36:48 +0000 |
| commit | 37b1d7b36fa144b0733dfc1659defe80cf384b15 (patch) | |
| tree | 579931b0bc9b890cf2748c96d87d15f8daae8645 /lldb/source | |
| parent | d878ca8487dca7d749ab298520b9e6cb83410aec (diff) | |
| download | bcm5719-llvm-37b1d7b36fa144b0733dfc1659defe80cf384b15.tar.gz bcm5719-llvm-37b1d7b36fa144b0733dfc1659defe80cf384b15.zip | |
Now a ppc64le binary is correctly detected:
(lldb) target create "tst"
Current executable set to 'tst' (powerpc64le).
(lldb) disassemble -n main
tst`main:
tst[0x7b0] <+0>: addis 2, 12, 2
tst[0x7b4] <+4>: addi 2, 2, 30544
tst[0x7b8] <+8>: mflr 0
Wihout the patch, the endianess was incorrect:
(lldb) target create "tst"
Current executable set to 'tst' (powerpc64).
(lldb) disassemble -n main
tst`main:
tst[0x7b0] <+0>: .long 0x02004c3c ; unknown opcode
tst[0x7b4] <+4>: rlwimi 23, 3, 8, 8, 28
tst[0x7b8] <+8>: lhzu 16, 2172(2)
tst[0x7bc] <+12>: .long 0x100001f8 ; unknown opcode
Simple binary used is identified as:
$ file tst
tst: ELF 64-bit LSB shared object, 64-bit PowerPC or cisco 7500, version
1 (SYSV), dynamically linked, interpreter /lib64/ld64.so.2, for
GNU/Linux 3.2.0, BuildID[sha1]=17a8fa2b24ce2837ba6625fabb34e6b29c6c5db7,
not stripped
Patch by Gustavo Serra Scalet <gustavo.scalet@eldorado.org.br>
Differential Revision: https://reviews.llvm.org/D36804
llvm-svn: 312151
Diffstat (limited to 'lldb/source')
| -rw-r--r-- | lldb/source/Core/ArchSpec.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lldb/source/Core/ArchSpec.cpp b/lldb/source/Core/ArchSpec.cpp index bfe9750f70f..43ca15a8b89 100644 --- a/lldb/source/Core/ArchSpec.cpp +++ b/lldb/source/Core/ArchSpec.cpp @@ -188,6 +188,8 @@ static const CoreDefinition g_core_definitions[] = { {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc970, "ppc970"}, + {eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64le, + ArchSpec::eCore_ppc64le_generic, "powerpc64le"}, {eByteOrderBig, 8, 4, 4, llvm::Triple::ppc64, ArchSpec::eCore_ppc64_generic, "powerpc64"}, {eByteOrderBig, 8, 4, 4, llvm::Triple::ppc64, @@ -414,6 +416,8 @@ static const ArchDefinitionEntry g_elf_arch_entries[] = { 0xFFFFFFFFu, 0xFFFFFFFFu}, // Intel MCU // FIXME: is this correct? {ArchSpec::eCore_ppc_generic, llvm::ELF::EM_PPC, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC + {ArchSpec::eCore_ppc64le_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE, + 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC64le {ArchSpec::eCore_ppc64_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC64 {ArchSpec::eCore_arm_generic, llvm::ELF::EM_ARM, LLDB_INVALID_CPUTYPE, |
