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author | Muhammad Omair Javaid <omair.javaid@linaro.org> | 2019-11-13 05:30:25 +0500 |
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committer | Muhammad Omair Javaid <omair.javaid@linaro.org> | 2019-11-13 05:40:09 +0500 |
commit | 9b958356983afffaf56788f37bdab9213369fa45 (patch) | |
tree | 3a3bc2601f4f6b77d90d4473150a83a3b2f98df1 /lldb/source/Utility | |
parent | 5ad6f279f26cd6ce77e4fa6b8df2b23be73d7beb (diff) | |
download | bcm5719-llvm-9b958356983afffaf56788f37bdab9213369fa45.tar.gz bcm5719-llvm-9b958356983afffaf56788f37bdab9213369fa45.zip |
[LLDB] Add core definition for armv8l and armv7l
This patch adds core definitions in lldb ArchSpecs for armv8l and armv7l cores.
This was needed because on Linux running on 32-bit Arm v8 we are returned
armv8l in case we are running 32-bit sysroot on 64bit kernel. In case of 32-bit
kernel and 32-bit sysroot running on arm v8 hardware we are returned armv7l.
This is quite common when we run 32 bit arm using docker container.
Signed-off-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Differential Revision: https://reviews.llvm.org/D69904
Diffstat (limited to 'lldb/source/Utility')
-rw-r--r-- | lldb/source/Utility/ArchSpec.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lldb/source/Utility/ArchSpec.cpp b/lldb/source/Utility/ArchSpec.cpp index a8781251ef8..62d9d246255 100644 --- a/lldb/source/Utility/ArchSpec.cpp +++ b/lldb/source/Utility/ArchSpec.cpp @@ -61,6 +61,8 @@ static const CoreDefinition g_core_definitions[] = { "armv6m"}, {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7, "armv7"}, + {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7l, + "armv7l"}, {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7f, "armv7f"}, {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7s, @@ -101,6 +103,8 @@ static const CoreDefinition g_core_definitions[] = { ArchSpec::eCore_arm_arm64, "arm64"}, {eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64, ArchSpec::eCore_arm_armv8, "armv8"}, + {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, + ArchSpec::eCore_arm_armv8l, "armv8l"}, {eByteOrderLittle, 4, 4, 4, llvm::Triple::aarch64_32, ArchSpec::eCore_arm_arm64_32, "arm64_32"}, {eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64, @@ -1188,6 +1192,8 @@ static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2, case ArchSpec::eCore_arm_armv7f: case ArchSpec::eCore_arm_armv7k: case ArchSpec::eCore_arm_armv7s: + case ArchSpec::eCore_arm_armv7l: + case ArchSpec::eCore_arm_armv8l: if (!enforce_exact_match) { if (core2 == ArchSpec::eCore_arm_generic) return true; |