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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2018-11-12 18:48:17 +0000
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2018-11-12 18:48:17 +0000
commite86c8d33b1d3eacaa616e3d8a6c99638cbe3f9e3 (patch)
treed2eebd4b195751f663b78768206a66df0bfd8c41 /lldb/source/Utility/DataBufferLLVM.cpp
parent8512e5909e1e5bd996e88e96df9ed572b6016f2e (diff)
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[AMDGPU] Optimize S_CBRANCH_VCC[N]Z -> S_CBRANCH_EXEC[N]Z
Sometimes after basic block placement we end up with a code like: sreg = s_mov_b64 -1 vcc = s_and_b64 exec, sreg s_cbranch_vccz This happens as a join of a block assigning -1 to a saved mask and another block which consumes that saved mask with s_and_b64 and a branch. This is essentially a single s_cbranch_execz instruction when moved into a single new basic block. Differential Revision: https://reviews.llvm.org/D54164 llvm-svn: 346690
Diffstat (limited to 'lldb/source/Utility/DataBufferLLVM.cpp')
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