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| author | Sanjay Patel <spatel@rotateright.com> | 2015-09-03 15:03:19 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-09-03 15:03:19 +0000 |
| commit | ce74db9d8ddc107fd53e7252d92be808ef264515 (patch) | |
| tree | 58d93437f471e76a74e562a8487e8955329ac4dd /lldb/source/Target/ThreadPlanPython.cpp | |
| parent | 6295b271843bb5d0eacf2e672819eb4602aff6ed (diff) | |
| download | bcm5719-llvm-ce74db9d8ddc107fd53e7252d92be808ef264515.tar.gz bcm5719-llvm-ce74db9d8ddc107fd53e7252d92be808ef264515.zip | |
check for fastness before merging in DAGCombiner::MergeConsecutiveStores()
Use and check the 'IsFast' optional parameter to TLI.allowsMemoryAccess() any time
we have a merged access candidate. Without this patch, we were generating unaligned
16-byte (SSE) memops for x86 targets where those accesses are slow.
This change was mentioned in:
http://reviews.llvm.org/D10662 and
http://reviews.llvm.org/D10905
and will help solve PR21711.
Differential Revision: http://reviews.llvm.org/D12573
llvm-svn: 246771
Diffstat (limited to 'lldb/source/Target/ThreadPlanPython.cpp')
0 files changed, 0 insertions, 0 deletions
