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| author | Sander de Smalen <sander.desmalen@arm.com> | 2019-12-03 13:52:47 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2019-12-03 14:48:29 +0000 |
| commit | 8bf31e28d7b6eb5743bda82fc5f8a98152b50e57 (patch) | |
| tree | 8eea51b6e78d62f26e3b92306e86edd821e6ce62 /lldb/source/Plugins/ScriptInterpreter/Python | |
| parent | 8dd17a13b04f00c41bc72fdb12a552f2df26e516 (diff) | |
| download | bcm5719-llvm-8bf31e28d7b6eb5743bda82fc5f8a98152b50e57.tar.gz bcm5719-llvm-8bf31e28d7b6eb5743bda82fc5f8a98152b50e57.zip | |
[Aarch64][SVE] Add intrinsics for gather loads with 32-bits offsets
This patch adds intrinsics for SVE gather loads for which the offsets are 32-bits wide and are:
* unscaled
* @llvm.aarch64.sve.ld1.gather.sxtw
* @llvm.aarch64.sve.ld1.gather.uxtw
* scaled (offsets become indices)
* @llvm.arch64.sve.ld1.gather.sxtw.index
* @llvm.arch64.sve.ld1.gather.uxtw.index
The offsets are either zero (uxtw) or sign (sxtw) extended to 64 bits.
These intrinsics map 1-1 to the corresponding SVE instructions (examples for half-words):
* unscaled
* ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
* ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
* scaled
* ld1h { z0.s }, p0/z, [x0, z0.s, sxtw #1]
* ld1h { z0.s }, p0/z, [x0, z0.s, uxtw #1]
Committed on behalf of Andrzej Warzynski (andwar)
Reviewers: sdesmalen, kmclaughlin, eli.friedman, rengolin, rovka, huntergr, dancgr, mgudim, efriedma
Reviewed By: sdesmalen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70782
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python')
0 files changed, 0 insertions, 0 deletions
