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authorEli Friedman <efriedma@quicinc.com>2019-03-25 22:42:30 +0000
committerEli Friedman <efriedma@quicinc.com>2019-03-25 22:42:30 +0000
commit1e5d569c8c789b3d995bcecc354c44cea60902e8 (patch)
tree9692e8824aa8c93ba3fa5f211292e04dd53c9058 /lldb/source/Plugins/ScriptInterpreter/Python
parent3bc703d5380cfe4f3aacd4c5f124e0d0f6cf3727 (diff)
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[ARM] Add missing memory operands to a bunch of instructions.
This should hopefully lead to minor improvements in code generation, and more accurate spill/reload comments in assembly. Also fix isLoadFromStackSlotPostFE/isStoreToStackSlotPostFE so they don't lead to misleading assembly comments for merged memory operands; this is technically orthogonal, but in practice the relevant memory operand lists don't show up without this change. Differential Revision: https://reviews.llvm.org/D59713 llvm-svn: 356963
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