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authorDavid Green <david.green@arm.com>2019-07-24 11:51:36 +0000
committerDavid Green <david.green@arm.com>2019-07-24 11:51:36 +0000
commitc7e55d4f5213d27456c8a2f74ee5284181067d73 (patch)
tree42037fd6749f9c33af253a6d9dfbf4a7e3f0d8b6 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
parentb09bc8a27dd7846ce446cab9e2548c8d29d74750 (diff)
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[ARM] MVE predicate register support
This adds support code for building and shuffling i1 predicate registers. It generally uses two basic principles, either converting the predicate into an scalar (through a PREDICATE_CAST) and doing scalar operations on it there, or by converting the register to an full vector register and back. Some of the code here is a not super efficient but will hopefully cover most cases of moving i1 vectors around and can be improved in subsequent patches. Some code by David Sherwood. Differential Revision: https://reviews.llvm.org/D65052 llvm-svn: 366890
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