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author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-01 19:57:57 +0000 |
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committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-01 19:57:57 +0000 |
commit | 9cbe7c7f9348762c59c42fcad54df742180786bd (patch) | |
tree | 88d566b177b37791376c0adc519dc4b00a553206 /lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h | |
parent | 7b861f08cd007bcdb18c6d2895ecc4b17b686d06 (diff) | |
download | bcm5719-llvm-9cbe7c7f9348762c59c42fcad54df742180786bd.tar.gz bcm5719-llvm-9cbe7c7f9348762c59c42fcad54df742180786bd.zip |
[globalisel][tablegen] Add support for multi-insn emission
The importer will now accept nested instructions in the result pattern such as
(ADDWrr $a, (SUBWrr $b, $c)). This is only valid when the nested instruction
def's a single vreg and the parent instruction consumes a single vreg where a
nested instruction is specified. The importer will automatically create a vreg
to connect the two using the type information from the pattern. This vreg will
be constrained to the register classes given in the instruction definitions*.
* REG_SEQUENCE is explicitly rejected because of this. The definition doesn't
constrain to a register class and it therefore needs special handling.
llvm-svn: 317117
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h')
0 files changed, 0 insertions, 0 deletions