summaryrefslogtreecommitdiffstats
path: root/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2017-11-01 21:00:59 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-01 21:00:59 +0000
commit4e56ba271e808f5d93184440ee9345133697d749 (patch)
treec45701d658cfc8735ae35286d9b1775fba51d26d /lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
parent98c6549e4acc8f42959a393aae9ba63d32f10f4b (diff)
downloadbcm5719-llvm-4e56ba271e808f5d93184440ee9345133697d749.tar.gz
bcm5719-llvm-4e56ba271e808f5d93184440ee9345133697d749.zip
[X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q into VPALIGNR if the extended registers aren't being used.
This will enable us to prefer VALIGND/Q during shuffle lowering in order to get the extended register encoding space when BWI isn't available. But if we end up not using the extended registers we can switch VPALIGNR for the shorter VEX encoding. Differential Revision: https://reviews.llvm.org/D39401 llvm-svn: 317122
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud