FreeBSD/arm core file support

Patch by Andrew Turner, with minor edits. XCode changes are mine; please
update if necessary.

llvm-svn: 235305

4 files changed, 168 insertions, 0 deletions

diff --git a/lldb/source/Plugins/Process/Utility/CMakeLists.txt b/lldb/source/Plugins/Process/Utility/CMakeLists.txt
index 00ed3629b12..0b0b6acaf74 100644
--- a/lldb/source/Plugins/Process/Utility/CMakeLists.txt
+++ b/lldb/source/Plugins/Process/Utility/CMakeLists.txt
@@ -15,6 +15,7 @@ add_lldb_library(lldbPluginProcessUtility
   RegisterContextDarwin_i386.cpp
   RegisterContextDarwin_x86_64.cpp
   RegisterContextDummy.cpp
+  RegisterContextFreeBSD_arm.cpp
   RegisterContextFreeBSD_arm64.cpp
   RegisterContextFreeBSD_i386.cpp
   RegisterContextFreeBSD_mips64.cpp
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
new file mode 100644
index 00000000000..8005a6339f6
--- /dev/null
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
@@ -0,0 +1,88 @@
+//===-- RegisterContextFreeBSD_arm.cpp -------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===---------------------------------------------------------------------===//
+
+#include <stddef.h>
+#include <vector>
+#include <cassert>
+
+#include "llvm/Support/Compiler.h"
+#include "lldb/lldb-defines.h"
+
+#include "RegisterContextFreeBSD_arm.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+// Based on RegisterContextLinux_arm.cpp and
+// http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
+#define GPR_OFFSET(idx) ((idx) * 4)
+#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
+#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
+#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
+
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
+#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))
+
+//-----------------------------------------------------------------------------
+// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
+//-----------------------------------------------------------------------------
+#define DECLARE_REGISTER_INFOS_ARM_STRUCT
+#include "RegisterInfos_arm.h"
+#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
+
+static const lldb_private::RegisterInfo *
+GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
+{
+    switch (target_arch.GetMachine())
+    {
+        case llvm::Triple::arm:
+            return g_register_infos_arm;
+        default:
+            assert(false && "Unhandled target architecture.");
+            return NULL;
+    }
+}
+
+static uint32_t
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
+{
+    switch (target_arch.GetMachine())
+    {
+        case llvm::Triple::arm:
+            return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
+        default:
+            assert(false && "Unhandled target architecture.");
+            return 0;
+    }
+}
+
+RegisterContextFreeBSD_arm::RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch) :
+    lldb_private::RegisterInfoInterface(target_arch),
+    m_register_info_p(GetRegisterInfoPtr(target_arch)),
+    m_register_info_count(GetRegisterInfoCount(target_arch))
+{
+}
+
+size_t
+RegisterContextFreeBSD_arm::GetGPRSize() const
+{
+    return sizeof(struct RegisterContextFreeBSD_arm::GPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterContextFreeBSD_arm::GetRegisterInfo() const
+{
+    return m_register_info_p;
+}
+
+uint32_t
+RegisterContextFreeBSD_arm::GetRegisterCount() const
+{
+    return m_register_info_count;
+}
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
new file mode 100644
index 00000000000..c4287e9f0a4
--- /dev/null
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h
@@ -0,0 +1,75 @@
+//===-- RegisterContextFreeBSD_arm.h ----------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef liblldb_RegisterContextFreeBSD_arm_h_
+#define liblldb_RegisterContextFreeBSD_arm_h_
+
+#include "lldb/lldb-private.h"
+#include "lldb/Target/RegisterContext.h"
+#include "RegisterContextPOSIX.h"
+#include "RegisterInfoInterface.h"
+
+class RegisterContextFreeBSD_arm
+    : public lldb_private::RegisterInfoInterface
+{
+public:
+
+    struct GPR
+    {
+        uint32_t    r[16];  // R0-R15
+        uint32_t    cpsr;   // CPSR
+    };
+
+
+    struct QReg
+    {
+        uint8_t bytes[16];
+    };
+
+    struct FPU
+    {
+        union {
+            uint32_t s[32];
+            uint64_t d[32];
+            QReg     q[16];  // the 128-bit NEON registers
+        } floats;
+        uint32_t fpscr;
+    };
+    struct EXC
+    {
+        uint32_t    exception;
+        uint32_t    fsr; /* Fault status */
+        uint32_t    far; /* Virtual Fault Address */
+    };
+
+    struct DBG
+    {
+        uint32_t bvr[16];
+        uint32_t bcr[16];
+        uint32_t wvr[16];
+        uint32_t wcr[16];
+    };
+
+    RegisterContextFreeBSD_arm(const lldb_private::ArchSpec &target_arch);
+
+    size_t
+    GetGPRSize() const override;
+
+    const lldb_private::RegisterInfo *
+    GetRegisterInfo() const override;
+
+    uint32_t
+    GetRegisterCount () const override;
+
+private:
+    const lldb_private::RegisterInfo *m_register_info_p;
+    uint32_t m_register_info_count;
+};
+
+#endif  // liblldb_RegisterContextFreeBSD_arm_h_
diff --git a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
index 298f5c31df9..170e8354fa4 100644
--- a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
+++ b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
@@ -18,6 +18,7 @@
 #include "ProcessElfCore.h"
 #include "Plugins/Process/Utility/RegisterContextLinux_arm.h"
 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h"
+#include "Plugins/Process/Utility/RegisterContextFreeBSD_arm.h"
 #include "Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h"
 #include "Plugins/Process/Utility/RegisterContextFreeBSD_i386.h"
 #include "Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h"
@@ -104,6 +105,9 @@ ThreadElfCore::CreateRegisterContextForFrame (StackFrame *frame)
                     case llvm::Triple::aarch64:
                         reg_interface = new RegisterContextFreeBSD_arm64(arch);
                         break;
+                    case llvm::Triple::arm:
+                        reg_interface = new RegisterContextFreeBSD_arm(arch);
+                        break;
                     case llvm::Triple::ppc:
                         reg_interface = new RegisterContextFreeBSD_powerpc32(arch);
                         break;