Add the new arm64 sub-register definitions to NativeRegisterContextLinux

It's quite sad that we have to edit so many files just to add a register. I am
going to investigate how to merge these definitions somehow, but for now this
should at least get arm64 linux working again.

llvm-svn: 284970

3 files changed, 148 insertions, 3 deletions

diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
index 9171029cd13..cb0700de69f 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -52,7 +52,14 @@ static const uint32_t g_gpr_regnums_arm64[] = {
     gpr_x20_arm64,      gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
     gpr_x24_arm64,      gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
     gpr_x28_arm64,      gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
-    gpr_pc_arm64,       gpr_cpsr_arm64,
+    gpr_pc_arm64,       gpr_cpsr_arm64, gpr_w0_arm64,  gpr_w1_arm64,
+    gpr_w2_arm64,       gpr_w3_arm64,   gpr_w4_arm64,  gpr_w5_arm64,
+    gpr_w6_arm64,       gpr_w7_arm64,   gpr_w8_arm64,  gpr_w9_arm64,
+    gpr_w10_arm64,      gpr_w11_arm64,  gpr_w12_arm64, gpr_w13_arm64,
+    gpr_w14_arm64,      gpr_w15_arm64,  gpr_w16_arm64, gpr_w17_arm64,
+    gpr_w18_arm64,      gpr_w19_arm64,  gpr_w20_arm64, gpr_w21_arm64,
+    gpr_w22_arm64,      gpr_w23_arm64,  gpr_w24_arm64, gpr_w25_arm64,
+    gpr_w26_arm64,      gpr_w27_arm64,  gpr_w28_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
 static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
@@ -69,6 +76,23 @@ static const uint32_t g_fpu_regnums_arm64[] = {
     fpu_v20_arm64,      fpu_v21_arm64,  fpu_v22_arm64, fpu_v23_arm64,
     fpu_v24_arm64,      fpu_v25_arm64,  fpu_v26_arm64, fpu_v27_arm64,
     fpu_v28_arm64,      fpu_v29_arm64,  fpu_v30_arm64, fpu_v31_arm64,
+    fpu_s0_arm64,       fpu_s1_arm64,   fpu_s2_arm64,  fpu_s3_arm64,
+    fpu_s4_arm64,       fpu_s5_arm64,   fpu_s6_arm64,  fpu_s7_arm64,
+    fpu_s8_arm64,       fpu_s9_arm64,   fpu_s10_arm64, fpu_s11_arm64,
+    fpu_s12_arm64,      fpu_s13_arm64,  fpu_s14_arm64, fpu_s15_arm64,
+    fpu_s16_arm64,      fpu_s17_arm64,  fpu_s18_arm64, fpu_s19_arm64,
+    fpu_s20_arm64,      fpu_s21_arm64,  fpu_s22_arm64, fpu_s23_arm64,
+    fpu_s24_arm64,      fpu_s25_arm64,  fpu_s26_arm64, fpu_s27_arm64,
+    fpu_s28_arm64,      fpu_s29_arm64,  fpu_s30_arm64, fpu_s31_arm64,
+
+    fpu_d0_arm64,       fpu_d1_arm64,   fpu_d2_arm64,  fpu_d3_arm64,
+    fpu_d4_arm64,       fpu_d5_arm64,   fpu_d6_arm64,  fpu_d7_arm64,
+    fpu_d8_arm64,       fpu_d9_arm64,   fpu_d10_arm64, fpu_d11_arm64,
+    fpu_d12_arm64,      fpu_d13_arm64,  fpu_d14_arm64, fpu_d15_arm64,
+    fpu_d16_arm64,      fpu_d17_arm64,  fpu_d18_arm64, fpu_d19_arm64,
+    fpu_d20_arm64,      fpu_d21_arm64,  fpu_d22_arm64, fpu_d23_arm64,
+    fpu_d24_arm64,      fpu_d25_arm64,  fpu_d26_arm64, fpu_d27_arm64,
+    fpu_d28_arm64,      fpu_d29_arm64,  fpu_d30_arm64, fpu_d31_arm64,
     fpu_fpsr_arm64,     fpu_fpcr_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
index 06569cfca59..17c9dc301b5 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
@@ -36,7 +36,14 @@ const uint32_t g_gpr_regnums_arm64[] = {
     gpr_x20_arm64,      gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
     gpr_x24_arm64,      gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
     gpr_x28_arm64,      gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
-    gpr_pc_arm64,       gpr_cpsr_arm64,
+    gpr_pc_arm64,       gpr_cpsr_arm64, gpr_w0_arm64,  gpr_w1_arm64,
+    gpr_w2_arm64,       gpr_w3_arm64,   gpr_w4_arm64,  gpr_w5_arm64,
+    gpr_w6_arm64,       gpr_w7_arm64,   gpr_w8_arm64,  gpr_w9_arm64,
+    gpr_w10_arm64,      gpr_w11_arm64,  gpr_w12_arm64, gpr_w13_arm64,
+    gpr_w14_arm64,      gpr_w15_arm64,  gpr_w16_arm64, gpr_w17_arm64,
+    gpr_w18_arm64,      gpr_w19_arm64,  gpr_w20_arm64, gpr_w21_arm64,
+    gpr_w22_arm64,      gpr_w23_arm64,  gpr_w24_arm64, gpr_w25_arm64,
+    gpr_w26_arm64,      gpr_w27_arm64,  gpr_w28_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
 static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
@@ -53,6 +60,23 @@ static const uint32_t g_fpu_regnums_arm64[] = {
     fpu_v20_arm64,      fpu_v21_arm64,  fpu_v22_arm64, fpu_v23_arm64,
     fpu_v24_arm64,      fpu_v25_arm64,  fpu_v26_arm64, fpu_v27_arm64,
     fpu_v28_arm64,      fpu_v29_arm64,  fpu_v30_arm64, fpu_v31_arm64,
+    fpu_s0_arm64,       fpu_s1_arm64,   fpu_s2_arm64,  fpu_s3_arm64,
+    fpu_s4_arm64,       fpu_s5_arm64,   fpu_s6_arm64,  fpu_s7_arm64,
+    fpu_s8_arm64,       fpu_s9_arm64,   fpu_s10_arm64, fpu_s11_arm64,
+    fpu_s12_arm64,      fpu_s13_arm64,  fpu_s14_arm64, fpu_s15_arm64,
+    fpu_s16_arm64,      fpu_s17_arm64,  fpu_s18_arm64, fpu_s19_arm64,
+    fpu_s20_arm64,      fpu_s21_arm64,  fpu_s22_arm64, fpu_s23_arm64,
+    fpu_s24_arm64,      fpu_s25_arm64,  fpu_s26_arm64, fpu_s27_arm64,
+    fpu_s28_arm64,      fpu_s29_arm64,  fpu_s30_arm64, fpu_s31_arm64,
+
+    fpu_d0_arm64,       fpu_d1_arm64,   fpu_d2_arm64,  fpu_d3_arm64,
+    fpu_d4_arm64,       fpu_d5_arm64,   fpu_d6_arm64,  fpu_d7_arm64,
+    fpu_d8_arm64,       fpu_d9_arm64,   fpu_d10_arm64, fpu_d11_arm64,
+    fpu_d12_arm64,      fpu_d13_arm64,  fpu_d14_arm64, fpu_d15_arm64,
+    fpu_d16_arm64,      fpu_d17_arm64,  fpu_d18_arm64, fpu_d19_arm64,
+    fpu_d20_arm64,      fpu_d21_arm64,  fpu_d22_arm64, fpu_d23_arm64,
+    fpu_d24_arm64,      fpu_d25_arm64,  fpu_d26_arm64, fpu_d27_arm64,
+    fpu_d28_arm64,      fpu_d29_arm64,  fpu_d30_arm64, fpu_d31_arm64,
     fpu_fpsr_arm64,     fpu_fpcr_arm64,
     LLDB_INVALID_REGNUM // register sets need to end with this flag
 };
diff --git a/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h b/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
index 425a49ab2b0..7181ce44819 100644
--- a/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
+++ b/lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
@@ -53,7 +53,37 @@ enum {
   gpr_pc_arm64,
   gpr_cpsr_arm64,
 
-  k_last_gpr_arm64 = gpr_cpsr_arm64,
+  gpr_w0_arm64,
+  gpr_w1_arm64,
+  gpr_w2_arm64,
+  gpr_w3_arm64,
+  gpr_w4_arm64,
+  gpr_w5_arm64,
+  gpr_w6_arm64,
+  gpr_w7_arm64,
+  gpr_w8_arm64,
+  gpr_w9_arm64,
+  gpr_w10_arm64,
+  gpr_w11_arm64,
+  gpr_w12_arm64,
+  gpr_w13_arm64,
+  gpr_w14_arm64,
+  gpr_w15_arm64,
+  gpr_w16_arm64,
+  gpr_w17_arm64,
+  gpr_w18_arm64,
+  gpr_w19_arm64,
+  gpr_w20_arm64,
+  gpr_w21_arm64,
+  gpr_w22_arm64,
+  gpr_w23_arm64,
+  gpr_w24_arm64,
+  gpr_w25_arm64,
+  gpr_w26_arm64,
+  gpr_w27_arm64,
+  gpr_w28_arm64,
+
+  k_last_gpr_arm64 = gpr_w28_arm64,
 
   k_first_fpr_arm64,
   fpu_v0_arm64 = k_first_fpr_arm64,
@@ -88,6 +118,73 @@ enum {
   fpu_v29_arm64,
   fpu_v30_arm64,
   fpu_v31_arm64,
+
+  fpu_s0_arm64,
+  fpu_s1_arm64,
+  fpu_s2_arm64,
+  fpu_s3_arm64,
+  fpu_s4_arm64,
+  fpu_s5_arm64,
+  fpu_s6_arm64,
+  fpu_s7_arm64,
+  fpu_s8_arm64,
+  fpu_s9_arm64,
+  fpu_s10_arm64,
+  fpu_s11_arm64,
+  fpu_s12_arm64,
+  fpu_s13_arm64,
+  fpu_s14_arm64,
+  fpu_s15_arm64,
+  fpu_s16_arm64,
+  fpu_s17_arm64,
+  fpu_s18_arm64,
+  fpu_s19_arm64,
+  fpu_s20_arm64,
+  fpu_s21_arm64,
+  fpu_s22_arm64,
+  fpu_s23_arm64,
+  fpu_s24_arm64,
+  fpu_s25_arm64,
+  fpu_s26_arm64,
+  fpu_s27_arm64,
+  fpu_s28_arm64,
+  fpu_s29_arm64,
+  fpu_s30_arm64,
+  fpu_s31_arm64,
+
+  fpu_d0_arm64,
+  fpu_d1_arm64,
+  fpu_d2_arm64,
+  fpu_d3_arm64,
+  fpu_d4_arm64,
+  fpu_d5_arm64,
+  fpu_d6_arm64,
+  fpu_d7_arm64,
+  fpu_d8_arm64,
+  fpu_d9_arm64,
+  fpu_d10_arm64,
+  fpu_d11_arm64,
+  fpu_d12_arm64,
+  fpu_d13_arm64,
+  fpu_d14_arm64,
+  fpu_d15_arm64,
+  fpu_d16_arm64,
+  fpu_d17_arm64,
+  fpu_d18_arm64,
+  fpu_d19_arm64,
+  fpu_d20_arm64,
+  fpu_d21_arm64,
+  fpu_d22_arm64,
+  fpu_d23_arm64,
+  fpu_d24_arm64,
+  fpu_d25_arm64,
+  fpu_d26_arm64,
+  fpu_d27_arm64,
+  fpu_d28_arm64,
+  fpu_d29_arm64,
+  fpu_d30_arm64,
+  fpu_d31_arm64,
+
   fpu_fpsr_arm64,
   fpu_fpcr_arm64,
   k_last_fpr_arm64 = fpu_fpcr_arm64,